Include dependency graph for riscv.c:

Data Structures
struct	match_triggers_tdata1_fields

struct	tdata1_cache

struct	tdata2_cache

struct	trigger

struct	trigger_request_info

Macros
#define	BSCAN_TUNNEL_IR_WIDTH_NBITS 7

#define	DBUS 0x11

#define	DTMCONTROL 0x10

#define	DTMCONTROL_VERSION (0xf)

#define	RISCV_EBREAK_MODE_INVALID -1

#define	RISCV_HALT_GROUP_REPOLL_LIMIT 5

#define	RISCV_TRIGGER_HIT_NOT_FOUND ((int64_t)-1)

Enumerations
enum	{ RO_NORMAL , RO_REVERSED }

enum	mctrl6hitstatus { M6_HIT_ERROR , M6_HIT_NOT_SUPPORTED , M6_NOT_HIT , M6_HIT_BEFORE , M6_HIT_AFTER , M6_HIT_IMM_AFTER }

enum	riscv_cfg_opts { RISCV_CFG_EBREAK , RISCV_CFG_INVALID = -1 }

enum	riscv_next_action { RPH_NONE , RPH_RESUME , RPH_REMAIN_HALTED }

Functions
static int	add_trigger (struct target target, struct trigger trigger)

static struct riscv_private_config *	alloc_default_riscv_private_config (void)

static bool	can_use_napot_match (struct trigger *trigger)

static int	check_if_trigger_exists (struct target *target, unsigned int index)

static enum mctrl6hitstatus	check_mcontrol6_hit_status (struct target *target, riscv_reg_t tdata1, uint64_t hit_mask)

static int	check_virt_memory_access (struct target *target, target_addr_t address, uint32_t size, uint32_t count, bool is_write)

	COMMAND_HANDLER (handle_dump_sample_buf_command)

	COMMAND_HANDLER (handle_info)

	COMMAND_HANDLER (handle_memory_sample_command)

	COMMAND_HANDLER (handle_repeat_read)

	COMMAND_HANDLER (handle_reserve_trigger)

	COMMAND_HANDLER (handle_riscv_dm_read)

	COMMAND_HANDLER (handle_riscv_dm_write)

	COMMAND_HANDLER (handle_riscv_dmi_read)

	COMMAND_HANDLER (handle_riscv_dmi_write)

	COMMAND_HANDLER (handle_riscv_virt2phys_mode)

	COMMAND_HANDLER (riscv_authdata_read)

	COMMAND_HANDLER (riscv_authdata_write)

	COMMAND_HANDLER (riscv_etrigger)

	COMMAND_HANDLER (riscv_exec_progbuf)

	COMMAND_HANDLER (riscv_hide_csrs)

	COMMAND_HANDLER (riscv_icount)

	COMMAND_HANDLER (riscv_itrigger)

	COMMAND_HANDLER (riscv_reset_delays)

	COMMAND_HANDLER (riscv_resume_order)

	COMMAND_HANDLER (riscv_set_autofence)

	COMMAND_HANDLER (riscv_set_bscan_tunnel_ir)

	COMMAND_HANDLER (riscv_set_command_timeout_sec)

	COMMAND_HANDLER (riscv_set_ebreakm)

	COMMAND_HANDLER (riscv_set_ebreaks)

	COMMAND_HANDLER (riscv_set_ebreaku)

	COMMAND_HANDLER (riscv_set_enable_trigger_feature)

	COMMAND_HANDLER (riscv_set_expose_csrs)

	COMMAND_HANDLER (riscv_set_expose_custom)

	COMMAND_HANDLER (riscv_set_ir)

	COMMAND_HANDLER (riscv_set_maskisr)

	COMMAND_HANDLER (riscv_set_mem_access)

	COMMAND_HANDLER (riscv_set_reset_timeout_sec)

	COMMAND_HANDLER (riscv_use_bscan_tunnel)

	COMMAND_HELPER (ebreakx_deprecation_helper, enum riscv_priv_mode mode)

static	COMMAND_HELPER (report_reserved_triggers, struct target *target)

	COMMAND_HELPER (riscv_clear_trigger, int trigger_id, const char *name)

	COMMAND_HELPER (riscv_print_info_line, const char section, const char key, unsigned int value)

static	COMMAND_HELPER (riscv_print_info_line_if_available, const char section, const char key, unsigned int value, bool is_available)

static unsigned int	count_trailing_ones (riscv_reg_t reg)

static void	create_wp_trigger_cache (struct target *target)

static enum target_debug_reason	derive_debug_reason_without_hitbit (const struct target *target, riscv_reg_t dpc)

static int	disable_trigger_if_dmode (struct target *target, riscv_reg_t tdata1)

static int	disable_watchpoints (struct target target, bool wp_is_set)

int	dtmcs_scan (struct jtag_tap tap, uint32_t out, uint32_t in_ptr)

static int	dtmcs_scan_via_bscan (struct jtag_tap tap, uint32_t out, uint32_t in_ptr)

static int	ebreak_config_to_tcl_dict (const struct riscv_private_config config, char buffer)
	Obtain dcsr.ebreak* configuration as a Tcl dictionary. More...

static int	enable_watchpoints (struct target target, bool wp_is_set)

static struct match_triggers_tdata1_fields	fill_match_triggers_tdata1_fields_t2 (struct target target, struct trigger trigger)

static struct match_triggers_tdata1_fields	fill_match_triggers_tdata1_fields_t6 (struct target target, struct trigger trigger)

static int	find_first_trigger_by_id (struct target *target, int unique_id)

static int	find_next_free_trigger (struct target target, int type, bool chained, unsigned int idx)

static void	free_wp_triggers_cache (struct target *target)

static int	get_loadstore_membase_regno (struct target target, const riscv_insn_t instruction, int regid)

static int	get_loadstore_memoffset (struct target target, const riscv_insn_t instruction, int16_t memoffset)

static uint16_t	get_offset_cld (riscv_insn_t instruction)

static uint16_t	get_offset_cldsp (riscv_insn_t instruction)

static uint16_t	get_offset_clq (riscv_insn_t instruction)

static uint16_t	get_offset_clqsp (riscv_insn_t instruction)

static uint16_t	get_offset_clw (riscv_insn_t instruction)

static uint16_t	get_offset_clwsp (riscv_insn_t instruction)
	These functions are needed to extract individual bits (for offset) from the instruction. More...

static uint16_t	get_offset_csdsp (riscv_insn_t instruction)

static uint16_t	get_offset_csqsp (riscv_insn_t instruction)

static uint16_t	get_offset_cswsp (riscv_insn_t instruction)

static uint32_t	get_opcode (const riscv_insn_t instruction)

static uint32_t	get_rs1_c (riscv_insn_t instruction)
	Decode rs1' register num for RVC. More...

static struct target_type *	get_target_type (struct target *target)

static int	get_trigger_types (struct target target, unsigned int trigger_tinfo, riscv_reg_t tdata1)
	This function reads `tinfo` or `tdata1`, when reading `tinfo` fails, to determine trigger types supported by a trigger. More...

static int	halt_finish (struct target *target)

static int	halt_go (struct target *target)

static int	halt_prep (struct target *target)

static int	jim_configure_ebreak (struct riscv_private_config config, struct jim_getopt_info goi)

static int	jim_report_ebreak_config (const struct riscv_private_config config, Jim_Interp interp)

static void	log_trigger_request_info (struct trigger_request_info trig_info)

static int	maybe_add_trigger_t1 (struct target target, struct trigger trigger)

static int	maybe_add_trigger_t2_t6 (struct target target, struct trigger trigger, struct match_triggers_tdata1_fields fields)

static int	maybe_add_trigger_t2_t6_for_bp (struct target target, struct trigger trigger, struct match_triggers_tdata1_fields fields)

static int	maybe_add_trigger_t2_t6_for_wp (struct target target, struct trigger trigger, struct match_triggers_tdata1_fields fields)

static int	maybe_add_trigger_t3 (struct target *target, bool vs, bool vu, bool m, bool s, bool u, bool pending, unsigned int count, int unique_id)

static int	maybe_add_trigger_t4 (struct target *target, bool vs, bool vu, bool nmi, bool m, bool s, bool u, riscv_reg_t interrupts, int unique_id)

static int	maybe_add_trigger_t5 (struct target *target, bool vs, bool vu, bool m, bool s, bool u, riscv_reg_t exception_codes, int unique_id)

static int	old_or_new_riscv_poll (struct target *target)

static int	old_or_new_riscv_step (struct target *target, bool current, target_addr_t address, bool handle_breakpoints)

static int	old_or_new_riscv_step_impl (struct target *target, bool current, target_addr_t address, bool handle_breakpoints, int handle_callbacks)

static int	oldriscv_poll (struct target *target)

static int	oldriscv_step (struct target *target, bool current, uint32_t address, bool handle_breakpoints)

static bool	parse_csr_address (const char reg_address_str, unsigned int reg_addr)

static int	parse_reg_ranges (struct list_head ranges, const char tcl_arg, const char *reg_type, unsigned int max_val)

static int	parse_reg_ranges_impl (struct list_head ranges, char args, const char reg_type, unsigned int max_val, char *const name_buffer)

static int	read_by_given_size (struct target target, target_addr_t address, uint32_t size, uint8_t buffer, uint32_t access_size)
	Read one memory item of given "size". More...

static int	remove_trigger (struct target *target, int unique_id)

static int	resume_finish (struct target *target, bool debug_execution)

static int	resume_go (struct target *target, bool current, target_addr_t address, bool handle_breakpoints, bool debug_execution)
	Resume all the harts that have been prepped, as close to instantaneous as possible. More...

static int	resume_prep (struct target *target, bool current, target_addr_t address, bool handle_breakpoints, bool debug_execution)
	Get everything ready to resume. More...

static int	riscv_add_breakpoint (struct target target, struct breakpoint breakpoint)

void	riscv_add_bscan_tunneled_scan (struct jtag_tap tap, const struct scan_field field, riscv_bscan_tunneled_scan_context_t *ctxt)

int	riscv_add_watchpoint (struct target target, struct watchpoint watchpoint)

static int	riscv_address_translate (struct target target, const virt2phys_info_t info, target_addr_t ppn, const virt2phys_info_t extra_info, target_addr_t extra_ppn, target_addr_t virtual, target_addr_t physical)

static int	riscv_arch_state (struct target *target)

static int	riscv_assert_reset (struct target *target)

static int	riscv_checksum_memory (struct target target, target_addr_t address, uint32_t count, uint32_t checksum)

static int	riscv_create_target (struct target *target)

static unsigned int	riscv_data_bits (struct target *target)

static int	riscv_deassert_reset (struct target *target)

static void	riscv_deinit_target (struct target *target)

static int	riscv_dmi_read (struct target target, uint32_t value, uint32_t address)

static int	riscv_dmi_write (struct target *target, uint32_t dmi_address, uint32_t value)

static int	riscv_effective_privilege_mode (struct target target, int v_mode, int *effective_mode)

int	riscv_enumerate_triggers (struct target *target)
	Count triggers, and initialize trigger_count for each hart. More...

static int	riscv_examine (struct target *target)

int	riscv_execute_progbuf (struct target target, uint32_t cmderr)

void	riscv_fill_dm_nop (const struct target target, uint8_t buf)

void	riscv_fill_dmi_read (const struct target target, uint8_t buf, uint32_t a)

void	riscv_fill_dmi_write (const struct target target, uint8_t buf, uint32_t a, uint32_t d)

int	riscv_get_command_timeout_sec (void)

uint32_t	riscv_get_dmi_address (const struct target *target, uint32_t dm_address)

unsigned int	riscv_get_dmi_address_bits (const struct target *target)

static const char *	riscv_get_gdb_arch (const struct target *target)

static int	riscv_get_gdb_reg_list (struct target target, struct reg reg_list[], int reg_list_size, enum target_register_class reg_class)

static int	riscv_get_gdb_reg_list_internal (struct target target, struct reg reg_list[], int reg_list_size, enum target_register_class reg_class, bool is_read)

static int	riscv_get_gdb_reg_list_noread (struct target target, struct reg reg_list[], int reg_list_size, enum target_register_class reg_class)

int	riscv_get_hart_state (struct target target, enum riscv_hart_state state)

int	riscv_halt (struct target *target)

static int	riscv_halt_go_all_harts (struct target *target)

static enum riscv_halt_reason	riscv_halt_reason (struct target *target)

static int	riscv_hit_watchpoint (struct target target, struct watchpoint *hit_watchpoint)

static void	riscv_info_init (struct target target, struct riscv_info r)

static int	riscv_init_target (struct command_context cmd_ctx, struct target target)

static int	riscv_interrupts_disable (struct target target, riscv_reg_t old_mstatus)

static int	riscv_interrupts_restore (struct target *target, riscv_reg_t old_mstatus)

static int	riscv_jim_configure (struct target target, struct jim_getopt_info goi)

static int	riscv_mmu (struct target target, bool enabled)

int	riscv_openocd_poll (struct target *target)

int	riscv_openocd_step (struct target *target, bool current, target_addr_t address, bool handle_breakpoints)

static int	riscv_openocd_step_impl (struct target *target, bool current, target_addr_t address, bool handle_breakpoints, int handle_callbacks)

static int	riscv_poll_hart (struct target target, enum riscv_next_action next_action)

unsigned int	riscv_progbuf_size (struct target *target)

int	riscv_read_by_any_size (struct target target, target_addr_t address, uint32_t size, uint8_t buffer)
	Read one memory item using any memory access size that will work. More...

static int	riscv_read_memory (struct target target, target_addr_t address, uint32_t size, uint32_t count, uint8_t buffer)

static int	riscv_read_phys_memory (struct target target, target_addr_t phys_address, uint32_t size, uint32_t count, uint8_t buffer)

riscv_insn_t	riscv_read_progbuf (struct target *target, int index)

static int	riscv_remove_breakpoint (struct target target, struct breakpoint breakpoint)

int	riscv_remove_watchpoint (struct target target, struct watchpoint watchpoint)

static int	riscv_resume (struct target *target, bool current, target_addr_t address, bool handle_breakpoints, bool debug_execution, bool single_hart)

static int	riscv_resume_go_all_harts (struct target *target)

static int	riscv_run_algorithm (struct target target, int num_mem_params, struct mem_param mem_params, int num_reg_params, struct reg_param reg_params, target_addr_t entry_point, target_addr_t exit_point, unsigned int timeout_ms, void arch_info)

static int	riscv_rw_memory (struct target *target, const struct riscv_mem_access_args args)

static void	riscv_sample_buf_maybe_add_timestamp (struct target *target, bool before)

static int	riscv_step_rtos_hart (struct target *target)

bool	riscv_supports_extension (const struct target *target, char letter)

static int	riscv_target_resume (struct target *target, bool current, target_addr_t address, bool handle_breakpoints, bool debug_execution)

static int	riscv_trigger_detect_hit_bits (struct target target, int64_t unique_id, bool *need_single_step)
	Look at the trigger hit bits to find out which trigger is the reason we're halted. More...

static int	riscv_virt2phys (struct target target, target_addr_t virtual, target_addr_t physical)

bool	riscv_virt2phys_mode_is_hw (const struct target *target)

bool	riscv_virt2phys_mode_is_sw (const struct target *target)

const char *	riscv_virt2phys_mode_to_str (enum riscv_virt2phys_mode mode)

static int	riscv_virt2phys_v (struct target target, target_addr_t virtual, target_addr_t physical)

unsigned int	riscv_vlenb (const struct target *target)

int	riscv_write_by_any_size (struct target target, target_addr_t address, uint32_t size, uint8_t buffer)
	Write one memory item using any memory access size that will work. More...

static int	riscv_write_memory (struct target target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t buffer)

static int	riscv_write_phys_memory (struct target target, target_addr_t phys_address, uint32_t size, uint32_t count, const uint8_t buffer)

int	riscv_write_progbuf (struct target *target, unsigned int index, riscv_insn_t insn)

unsigned int	riscv_xlen (const struct target *target)

static unsigned int	riscv_xlen_nonconst (struct target *target)

static int	sample_memory (struct target *target)

void	select_dmi_via_bscan (struct jtag_tap *tap)

static int	set_debug_reason (struct target *target, enum riscv_halt_reason halt_reason)
	Set OpenOCD's generic debug reason from the RISC-V halt reason. More...

static int	set_trigger (struct target *target, unsigned int idx, riscv_reg_t tdata1, riscv_reg_t tdata2)

static struct tdata1_cache *	tdata1_cache_alloc (struct list_head *tdata1_cache_head, riscv_reg_t tdata1)

struct tdata1_cache *	tdata1_cache_search (struct list_head *tdata1_cache_head, riscv_reg_t find_tdata1)

static void	tdata2_cache_alloc (struct list_head *tdata2_cache_head, riscv_reg_t tdata2)

struct tdata2_cache *	tdata2_cache_search (struct list_head *tdata2_cache_head, riscv_reg_t find_tdata2)

static void	trigger_from_breakpoint (struct trigger trigger, const struct breakpoint breakpoint)

static void	trigger_from_watchpoint (struct trigger trigger, const struct watchpoint watchpoint)

static int	try_setup_chained_match_triggers (struct target target, struct trigger trigger, struct trigger_request_info t1, struct trigger_request_info t2)

static int	try_setup_single_match_trigger (struct target target, struct trigger trigger, struct trigger_request_info trig_info)

static int	try_use_trigger_and_cache_result (struct target *target, unsigned int idx, riscv_reg_t tdata1, riscv_reg_t tdata2)

static int	verify_loadstore (struct target target, const riscv_insn_t instruction, bool is_read)

static void	wp_triggers_cache_add (struct target *target, unsigned int idx, riscv_reg_t tdata1, riscv_reg_t tdata2, int error_code)

static bool	wp_triggers_cache_search (struct target *target, unsigned int idx, riscv_reg_t tdata1, riscv_reg_t tdata2)

static int	write_by_given_size (struct target target, target_addr_t address, uint32_t size, uint8_t buffer, uint32_t access_size)
	Write one memory item of given "size". More...

Variables
static struct scan_field	_bscan_tunnel_data_register_select_dmi []

static struct scan_field	_bscan_tunnel_nested_tap_select_dmi []

static const uint8_t	bscan_one [4] = {1}

static struct scan_field *	bscan_tunnel_data_register_select_dmi = _bscan_tunnel_data_register_select_dmi

static uint32_t	bscan_tunnel_data_register_select_dmi_num_fields = ARRAY_SIZE(_bscan_tunnel_data_register_select_dmi)

static int	bscan_tunnel_ir_id

uint8_t	bscan_tunnel_ir_width

static struct scan_field *	bscan_tunnel_nested_tap_select_dmi = _bscan_tunnel_nested_tap_select_dmi

static uint32_t	bscan_tunnel_nested_tap_select_dmi_num_fields = ARRAY_SIZE(_bscan_tunnel_nested_tap_select_dmi)

static bscan_tunnel_type_t	bscan_tunnel_type

static const uint8_t	bscan_zero [4] = {0}

static uint8_t	ir_dbus [4] = {DBUS}

static uint8_t	ir_dtmcontrol [4] = {DTMCONTROL}

static uint8_t	ir_idcode [4] = {0x1}

static uint8_t	ir_user4 [4]

static const riscv_reg_t	mstatus_ie_mask = MSTATUS_MIE \| MSTATUS_HIE \| MSTATUS_SIE \| MSTATUS_UIE

static struct jim_nvp	nvp_config_opts []

static struct jim_nvp	nvp_ebreak_config_opts []

static struct jim_nvp	nvp_ebreak_mode_opts []

static enum { ... }	resume_order

static const struct command_registration	riscv_command_handlers []

static int	riscv_command_timeout_sec_value = DEFAULT_COMMAND_TIMEOUT_SEC

static const struct command_registration	riscv_exec_command_handlers []

static int	riscv_reset_timeout_sec = DEFAULT_COMMAND_TIMEOUT_SEC

struct target_type	riscv_target

struct scan_field	select_dbus

struct scan_field	select_dtmcontrol

struct scan_field	select_idcode

static struct scan_field	select_user4

static const virt2phys_info_t	sv32

static const virt2phys_info_t	sv32x4

static const virt2phys_info_t	sv39

static const virt2phys_info_t	sv39x4

static const virt2phys_info_t	sv48

static const virt2phys_info_t	sv48x4

static const virt2phys_info_t	sv57

static const virt2phys_info_t	sv57x4

Macro Definition Documentation

◆ BSCAN_TUNNEL_IR_WIDTH_NBITS

#define BSCAN_TUNNEL_IR_WIDTH_NBITS 7

Definition at line 59 of file riscv.c.

◆ DBUS

#define DBUS 0x11

Definition at line 36 of file riscv.c.

◆ DTMCONTROL

#define DTMCONTROL 0x10

Definition at line 33 of file riscv.c.

◆ DTMCONTROL_VERSION

#define DTMCONTROL_VERSION (0xf)

Definition at line 34 of file riscv.c.

◆ RISCV_EBREAK_MODE_INVALID

#define RISCV_EBREAK_MODE_INVALID -1

Definition at line 520 of file riscv.c.

◆ RISCV_HALT_GROUP_REPOLL_LIMIT

#define RISCV_HALT_GROUP_REPOLL_LIMIT 5

Definition at line 40 of file riscv.c.

◆ RISCV_TRIGGER_HIT_NOT_FOUND

#define RISCV_TRIGGER_HIT_NOT_FOUND ((int64_t)-1)

Definition at line 38 of file riscv.c.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

Enumerator
RO_NORMAL
RO_REVERSED

Definition at line 184 of file riscv.c.

◆ mctrl6hitstatus

enum mctrl6hitstatus

Enumerator
M6_HIT_ERROR
M6_HIT_NOT_SUPPORTED
M6_NOT_HIT
M6_HIT_BEFORE
M6_HIT_AFTER
M6_HIT_IMM_AFTER

Definition at line 1771 of file riscv.c.

◆ riscv_cfg_opts

enum riscv_cfg_opts

Enumerator
RISCV_CFG_EBREAK
RISCV_CFG_INVALID

Definition at line 614 of file riscv.c.

◆ riscv_next_action

enum riscv_next_action

Enumerator
RPH_NONE
RPH_RESUME
RPH_REMAIN_HALTED

Definition at line 3832 of file riscv.c.

Function Documentation

◆ add_trigger()

static int add_trigger	(	struct target *	target,
		struct trigger *	trigger
	)

static

Definition at line 1455 of file riscv.c.

References ERROR_FAIL, ERROR_OK, fill_match_triggers_tdata1_fields_t2(), fill_match_triggers_tdata1_fields_t6(), GDB_REGNO_TSELECT, maybe_add_trigger_t1(), maybe_add_trigger_t2_t6(), riscv_enumerate_triggers(), riscv_reg_get(), and riscv_reg_set().

Referenced by riscv_add_breakpoint(), and riscv_add_watchpoint().

◆ alloc_default_riscv_private_config()

static struct riscv_private_config* alloc_default_riscv_private_config ( void )

static

Definition at line 478 of file riscv.c.

References ARRAY_SIZE, config, LOG_ERROR, and NULL.

Referenced by riscv_jim_configure().

◆ can_use_napot_match()

static bool can_use_napot_match ( struct trigger * trigger )

static

Definition at line 775 of file riscv.c.

References addr, trigger::address, trigger::length, and size.

Referenced by maybe_add_trigger_t2_t6_for_wp().

◆ check_if_trigger_exists()

static int check_if_trigger_exists	(	struct target *	target,
		unsigned int	index
	)

static

Definition at line 6137 of file riscv.c.

References ERROR_FAIL, ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, GDB_REGNO_TSELECT, riscv_reg_get(), riscv_reg_set(), and riscv_xlen().

Referenced by riscv_enumerate_triggers().

◆ check_mcontrol6_hit_status()

static enum mctrl6hitstatus check_mcontrol6_hit_status	(	struct target *	target,
		riscv_reg_t	tdata1,
		uint64_t	hit_mask
	)

static

Definition at line 1755 of file riscv.c.

References watchpoint::address, ERROR_OK, watchpoint::is_set, LOG_TARGET_DEBUG, remove_trigger(), TARGET_PRIxADDR, trigger_from_watchpoint(), and trigger::unique_id.

Referenced by riscv_trigger_detect_hit_bits().

◆ check_virt_memory_access()

static int check_virt_memory_access	(	struct target *	target,
		target_addr_t	address,
		uint32_t	size,
		uint32_t	count,
		bool	is_write
	)

static

Definition at line 3357 of file riscv.c.

References address, count, ERROR_FAIL, ERROR_OK, LOG_TARGET_ERROR, RISCV_PGBASE, size, and TARGET_PRIxADDR.

Referenced by riscv_rw_memory().

◆ COMMAND_HANDLER() [1/33]

COMMAND_HANDLER ( handle_dump_sample_buf_command )

Definition at line 5293 of file riscv.c.

References ARRAY_SIZE, base64_encode(), buf_get_u32(), buf_get_u64(), CMD, CMD_ARGC, CMD_ARGV, CMD_CTX, command_print(), command_print_sameline(), ERROR_COMMAND_SYNTAX_ERROR, ERROR_FAIL, ERROR_OK, get_current_target(), LOG_ERROR, LOG_TARGET_ERROR, NULL, RISCV_INFO, RISCV_SAMPLE_BUF_TIMESTAMP_AFTER, RISCV_SAMPLE_BUF_TIMESTAMP_BEFORE, and TARGET_PRIxADDR.

◆ COMMAND_HANDLER() [2/33]

COMMAND_HANDLER ( handle_info )

Definition at line 5385 of file riscv.c.

References CALL_COMMAND_HANDLER, CMD, CMD_CTX, ERROR_OK, get_current_target(), riscv_enumerate_triggers(), RISCV_INFO, and riscv_xlen().

◆ COMMAND_HANDLER() [3/33]

COMMAND_HANDLER ( handle_memory_sample_command )

Definition at line 5232 of file riscv.c.

References ARRAY_SIZE, CMD, CMD_ARGC, CMD_ARGV, CMD_CTX, COMMAND_PARSE_ADDRESS, COMMAND_PARSE_NUMBER, command_print(), ERROR_COMMAND_ARGUMENT_INVALID, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, get_current_target(), LOG_TARGET_ERROR, RISCV_INFO, target_name(), and TARGET_PRIxADDR.

◆ COMMAND_HANDLER() [4/33]

COMMAND_HANDLER ( handle_repeat_read )

Definition at line 5194 of file riscv.c.

References address, riscv_mem_access_args::address, buffer, cmd, CMD_ARGC, CMD_ARGV, CMD_CTX, COMMAND_PARSE_ADDRESS, COMMAND_PARSE_NUMBER, count, ERROR_COMMAND_SYNTAX_ERROR, ERROR_FAIL, ERROR_OK, get_current_target(), LOG_ERROR, RISCV_INFO, size, and target_handle_md_output().

◆ COMMAND_HANDLER() [5/33]

COMMAND_HANDLER ( handle_reserve_trigger )

Definition at line 5514 of file riscv.c.

References CALL_COMMAND_HANDLER, CMD, CMD_ARGC, CMD_ARGV, CMD_CTX, COMMAND_PARSE_NUMBER, COMMAND_PARSE_ON_OFF, command_print(), ERROR_COMMAND_SYNTAX_ERROR, ERROR_FAIL, ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, get_current_target(), riscv_enumerate_triggers(), and RISCV_INFO.

◆ COMMAND_HANDLER() [6/33]

COMMAND_HANDLER ( handle_riscv_dm_read )

Definition at line 4752 of file riscv.c.

References CMD, CMD_ARGC, CMD_ARGV, CMD_CTX, COMMAND_PARSE_NUMBER, command_print(), ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, get_current_target(), riscv_dmi_read(), and riscv_get_dmi_address().

◆ COMMAND_HANDLER() [7/33]

COMMAND_HANDLER ( handle_riscv_dm_write )

Definition at line 4769 of file riscv.c.

References CMD_ARGC, CMD_ARGV, CMD_CTX, COMMAND_PARSE_NUMBER, ERROR_COMMAND_SYNTAX_ERROR, get_current_target(), riscv_dmi_write(), and riscv_get_dmi_address().

◆ COMMAND_HANDLER() [8/33]

COMMAND_HANDLER ( handle_riscv_dmi_read )

Definition at line 4723 of file riscv.c.

References CMD, CMD_ARGC, CMD_ARGV, CMD_CTX, COMMAND_PARSE_NUMBER, command_print(), ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, get_current_target(), and riscv_dmi_read().

◆ COMMAND_HANDLER() [9/33]

COMMAND_HANDLER ( handle_riscv_dmi_write )

Definition at line 4739 of file riscv.c.

References CMD_ARGC, CMD_ARGV, CMD_CTX, COMMAND_PARSE_NUMBER, ERROR_COMMAND_SYNTAX_ERROR, get_current_target(), and riscv_dmi_write().

◆ COMMAND_HANDLER() [10/33]

COMMAND_HANDLER ( handle_riscv_virt2phys_mode )

Definition at line 5549 of file riscv.c.

References CMD, CMD_ARGC, CMD_ARGV, CMD_CTX, command_print(), ERROR_COMMAND_ARGUMENT_INVALID, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, get_current_target(), info, mode, riscv_info(), RISCV_VIRT2PHYS_MODE_HW, RISCV_VIRT2PHYS_MODE_OFF, RISCV_VIRT2PHYS_MODE_SW, and riscv_virt2phys_mode_to_str().

◆ COMMAND_HANDLER() [11/33]

COMMAND_HANDLER ( riscv_authdata_read )

Definition at line 4591 of file riscv.c.

References CMD, CMD_ARGC, CMD_ARGV, CMD_CTX, COMMAND_PARSE_NUMBER, command_print_sameline(), ERROR_COMMAND_SYNTAX_ERROR, ERROR_FAIL, ERROR_OK, get_current_target(), LOG_ERROR, LOG_TARGET_ERROR, and RISCV_INFO.

◆ COMMAND_HANDLER() [12/33]

COMMAND_HANDLER ( riscv_authdata_write )

Definition at line 4623 of file riscv.c.

References CMD_ARGC, CMD_ARGV, CMD_CTX, COMMAND_PARSE_NUMBER, ERROR_COMMAND_SYNTAX_ERROR, ERROR_FAIL, get_current_target(), LOG_TARGET_ERROR, and RISCV_INFO.

◆ COMMAND_HANDLER() [13/33]

COMMAND_HANDLER ( riscv_etrigger )

Definition at line 5132 of file riscv.c.

References CMD, CMD_ARGC, CMD_ARGV, CMD_CTX, COMMAND_PARSE_NUMBER, CSR_TDATA1_TYPE_ETRIGGER, ERROR_COMMAND_SYNTAX_ERROR, ERROR_FAIL, ERROR_OK, find_first_trigger_by_id(), get_current_target(), LOG_ERROR, LOG_TARGET_ERROR, maybe_add_trigger_t5(), and riscv_enumerate_triggers().

◆ COMMAND_HANDLER() [14/33]

COMMAND_HANDLER ( riscv_exec_progbuf )

◆ COMMAND_HANDLER() [15/33]

COMMAND_HANDLER ( riscv_hide_csrs )

Definition at line 4573 of file riscv.c.

References CMD_ARGC, CMD_ARGV, CMD_CTX, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, get_current_target(), info, parse_reg_ranges(), and RISCV_INFO.

◆ COMMAND_HANDLER() [16/33]

COMMAND_HANDLER ( riscv_icount )

Definition at line 5067 of file riscv.c.

References CMD, CMD_ARGC, CMD_ARGV, CMD_CTX, COMMAND_PARSE_NUMBER, count, CSR_TDATA1_TYPE_ICOUNT, ERROR_COMMAND_SYNTAX_ERROR, ERROR_FAIL, ERROR_OK, find_first_trigger_by_id(), get_current_target(), LOG_ERROR, LOG_TARGET_ERROR, maybe_add_trigger_t3(), and riscv_enumerate_triggers().

◆ COMMAND_HANDLER() [17/33]

COMMAND_HANDLER ( riscv_itrigger )

Definition at line 5002 of file riscv.c.

References CMD, CMD_ARGC, CMD_ARGV, CMD_CTX, COMMAND_PARSE_NUMBER, CSR_TDATA1_TYPE_ITRIGGER, ERROR_COMMAND_SYNTAX_ERROR, ERROR_FAIL, ERROR_OK, find_first_trigger_by_id(), get_current_target(), LOG_ERROR, LOG_TARGET_ERROR, maybe_add_trigger_t4(), and riscv_enumerate_triggers().

◆ COMMAND_HANDLER() [18/33]

COMMAND_HANDLER ( riscv_reset_delays )

Definition at line 4783 of file riscv.c.

References CMD_ARGC, CMD_ARGV, CMD_CTX, COMMAND_PARSE_NUMBER, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, get_current_target(), and RISCV_INFO.

◆ COMMAND_HANDLER() [19/33]

COMMAND_HANDLER ( riscv_resume_order )

Definition at line 4819 of file riscv.c.

References CMD_ARGC, CMD_ARGV, ERROR_COMMAND_SYNTAX_ERROR, ERROR_FAIL, ERROR_OK, LOG_ERROR, resume_order, RO_NORMAL, and RO_REVERSED.

◆ COMMAND_HANDLER() [20/33]

COMMAND_HANDLER ( riscv_set_autofence )

Definition at line 4908 of file riscv.c.

References CMD, CMD_ARGC, CMD_ARGV, CMD_CTX, COMMAND_PARSE_ON_OFF, command_print(), ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, get_current_target(), and RISCV_INFO.

◆ COMMAND_HANDLER() [21/33]

COMMAND_HANDLER ( riscv_set_bscan_tunnel_ir )

Definition at line 4867 of file riscv.c.

References bscan_tunnel_ir_id, CMD_ARGC, CMD_ARGV, COMMAND_PARSE_NUMBER, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, and LOG_INFO.

◆ COMMAND_HANDLER() [22/33]

COMMAND_HANDLER ( riscv_set_command_timeout_sec )

Definition at line 4295 of file riscv.c.

References CMD_ARGC, CMD_ARGV, ERROR_COMMAND_SYNTAX_ERROR, ERROR_FAIL, ERROR_OK, LOG_ERROR, and riscv_command_timeout_sec_value.

◆ COMMAND_HANDLER() [23/33]

COMMAND_HANDLER ( riscv_set_ebreakm )

Definition at line 4971 of file riscv.c.

References CALL_COMMAND_HANDLER, and RISCV_MODE_M.

◆ COMMAND_HANDLER() [24/33]

COMMAND_HANDLER ( riscv_set_ebreaks )

Definition at line 4977 of file riscv.c.

References CALL_COMMAND_HANDLER, and RISCV_MODE_S.

◆ COMMAND_HANDLER() [25/33]

COMMAND_HANDLER ( riscv_set_ebreaku )

Definition at line 4983 of file riscv.c.

References CALL_COMMAND_HANDLER, and RISCV_MODE_U.

◆ COMMAND_HANDLER() [26/33]

COMMAND_HANDLER ( riscv_set_enable_trigger_feature )

Definition at line 5455 of file riscv.c.

References CMD, CMD_ARGC, CMD_ARGV, CMD_CTX, command_print(), ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, get_current_target(), and RISCV_INFO.

◆ COMMAND_HANDLER() [27/33]

COMMAND_HANDLER ( riscv_set_expose_csrs )

Definition at line 4537 of file riscv.c.

References CMD_ARGC, CMD_ARGV, CMD_CTX, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, get_current_target(), info, parse_reg_ranges(), and RISCV_INFO.

◆ COMMAND_HANDLER() [28/33]

COMMAND_HANDLER ( riscv_set_expose_custom )

Definition at line 4555 of file riscv.c.

References CMD_ARGC, CMD_ARGV, CMD_CTX, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, get_current_target(), info, parse_reg_ranges(), and RISCV_INFO.

◆ COMMAND_HANDLER() [29/33]

COMMAND_HANDLER ( riscv_set_ir )

Definition at line 4799 of file riscv.c.

References buf_set_u32(), CMD_ARGC, CMD_ARGV, COMMAND_PARSE_NUMBER, ERROR_COMMAND_SYNTAX_ERROR, ERROR_FAIL, ERROR_OK, ir_dbus, ir_dtmcontrol, and ir_idcode.

◆ COMMAND_HANDLER() [30/33]

COMMAND_HANDLER ( riscv_set_maskisr )

Definition at line 4883 of file riscv.c.

References CMD, CMD_ARGC, CMD_ARGV, CMD_CTX, command_print(), ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, get_current_target(), info, jim_nvp_name2value_simple(), jim_nvp_value2name_simple(), jim_nvp::name, NULL, RISCV_INFO, RISCV_ISRMASK_OFF, RISCV_ISRMASK_STEPONLY, and jim_nvp::value.

◆ COMMAND_HANDLER() [31/33]

COMMAND_HANDLER ( riscv_set_mem_access )

Definition at line 4327 of file riscv.c.

References CMD, CMD_ARGC, CMD_ARGV, CMD_CTX, command_print(), ERROR_COMMAND_ARGUMENT_INVALID, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, get_current_target(), LOG_ERROR, RISCV_INFO, RISCV_MEM_ACCESS_ABSTRACT, RISCV_MEM_ACCESS_MAX_METHODS_NUM, RISCV_MEM_ACCESS_PROGBUF, and RISCV_MEM_ACCESS_SYSBUS.

◆ COMMAND_HANDLER() [32/33]

COMMAND_HANDLER ( riscv_set_reset_timeout_sec )

Definition at line 4311 of file riscv.c.

References CMD_ARGC, CMD_ARGV, ERROR_COMMAND_SYNTAX_ERROR, ERROR_FAIL, ERROR_OK, LOG_ERROR, LOG_WARNING, and riscv_reset_timeout_sec.

◆ COMMAND_HANDLER() [33/33]

COMMAND_HANDLER ( riscv_use_bscan_tunnel )

Definition at line 4836 of file riscv.c.

References BSCAN_TUNNEL_DATA_REGISTER, bscan_tunnel_ir_width, BSCAN_TUNNEL_IR_WIDTH_NBITS, BSCAN_TUNNEL_NESTED_TAP, bscan_tunnel_type, CMD, CMD_ARGC, CMD_ARGV, COMMAND_PARSE_NUMBER, command_print(), ERROR_COMMAND_ARGUMENT_OVERFLOW, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, and LOG_INFO.

◆ COMMAND_HELPER() [1/5]

COMMAND_HELPER	(	ebreakx_deprecation_helper	,
		enum riscv_priv_mode	mode
	)

Definition at line 4924 of file riscv.c.

References CMD, CMD_ARGC, CMD_ARGV, CMD_CTX, CMD_NAME, COMMAND_PARSE_ON_OFF, command_print(), config, ERROR_COMMAND_SYNTAX_ERROR, ERROR_OK, get_current_target(), LOG_WARNING, mode, RISCV_MODE_M, RISCV_MODE_S, RISCV_MODE_U, RISCV_MODE_VS, RISCV_MODE_VU, riscv_private_config(), and target_name().

◆ COMMAND_HELPER() [2/5]

static COMMAND_HELPER	(	report_reserved_triggers	,
		struct target *	target
	)

static

Definition at line 5498 of file riscv.c.

References CMD, command_print_sameline(), ERROR_FAIL, ERROR_OK, riscv_enumerate_triggers(), and RISCV_INFO.

◆ COMMAND_HELPER() [3/5]

COMMAND_HELPER	(	riscv_clear_trigger	,
		int	trigger_id,
		const char *	name
	)

Definition at line 4989 of file riscv.c.

References CMD_ARGC, CMD_CTX, ERROR_COMMAND_SYNTAX_ERROR, ERROR_FAIL, find_first_trigger_by_id(), get_current_target(), LOG_TARGET_ERROR, name, and remove_trigger().

◆ COMMAND_HELPER() [4/5]

COMMAND_HELPER	(	riscv_print_info_line	,
		const char *	section,
		const char *	key,
		unsigned int	value
	)

Definition at line 5378 of file riscv.c.

References CALL_COMMAND_HANDLER.

◆ COMMAND_HELPER() [5/5]

static COMMAND_HELPER	(	riscv_print_info_line_if_available	,
		const char *	section,
		const char *	key,
		unsigned int	value,
		bool	is_available
	)

static

Definition at line 5366 of file riscv.c.

References CMD, and command_print().

◆ count_trailing_ones()

static unsigned int count_trailing_ones ( riscv_reg_t reg )

static

Definition at line 831 of file riscv.c.

Referenced by set_trigger().

◆ create_wp_trigger_cache()

static void create_wp_trigger_cache ( struct target * target )

static

Definition at line 1020 of file riscv.c.

References INIT_LIST_HEAD(), and RISCV_INFO.

Referenced by riscv_enumerate_triggers().

◆ derive_debug_reason_without_hitbit()

static enum target_debug_reason derive_debug_reason_without_hitbit	(	const struct target *	target,
		riscv_reg_t	dpc
	)

static

Definition at line 2520 of file riscv.c.

References oldriscv_poll(), RISCV_INFO, and riscv_openocd_poll().

Referenced by set_debug_reason().

◆ disable_trigger_if_dmode()

static int disable_trigger_if_dmode	(	struct target *	target,
		riscv_reg_t	tdata1
	)

static

Definition at line 6178 of file riscv.c.

References CSR_ETRIGGER_DMODE, CSR_ICOUNT_DMODE, CSR_ITRIGGER_DMODE, CSR_MCONTROL6_DMODE, CSR_MCONTROL_DMODE, CSR_TDATA1_TYPE, CSR_TDATA1_TYPE_ETRIGGER, CSR_TDATA1_TYPE_ICOUNT, CSR_TDATA1_TYPE_ITRIGGER, CSR_TDATA1_TYPE_LEGACY, CSR_TDATA1_TYPE_MCONTROL, CSR_TDATA1_TYPE_MCONTROL6, ERROR_OK, GDB_REGNO_TDATA1, get_field(), riscv_reg_set(), and riscv_xlen().

Referenced by riscv_enumerate_triggers().

◆ disable_watchpoints()

static int disable_watchpoints	(	struct target *	target,
		bool *	wp_is_set
	)

static

Definition at line 2781 of file riscv.c.

References ERROR_FAIL, ERROR_OK, watchpoint::is_set, LOG_TARGET_DEBUG, watchpoint::next, RISCV_INFO, riscv_remove_watchpoint(), watchpoint::unique_id, and target::watchpoints.

Referenced by riscv_openocd_step_impl().

◆ dtmcs_scan()

int dtmcs_scan	(	struct jtag_tap *	tap,
		uint32_t	out,
		uint32_t *	in_ptr
	)

Definition at line 416 of file riscv.c.

References bscan_tunnel_ir_width, buf_get_u32(), buf_set_u32(), dtmcs_scan_via_bscan(), ERROR_OK, scan_field::in_value, jtag_add_dr_scan(), jtag_add_ir_scan(), jtag_execute_queue(), jtag_tap_name(), LOG_DEBUG, LOG_ERROR, NULL, scan_field::num_bits, select_dbus, select_dtmcontrol, and TAP_IDLE.

Referenced by examine(), increase_dbus_busy_delay(), increase_dmi_busy_delay(), and riscv_examine().

◆ dtmcs_scan_via_bscan()

static int dtmcs_scan_via_bscan	(	struct jtag_tap *	tap,
		uint32_t	out,
		uint32_t *	in_ptr
	)

static

Definition at line 330 of file riscv.c.

References ARRAY_SIZE, bscan_one, BSCAN_TUNNEL_DATA_REGISTER, bscan_tunnel_ir_width, BSCAN_TUNNEL_IR_WIDTH_NBITS, bscan_tunnel_type, bscan_zero, buf_get_u32(), buf_set_u32(), ERROR_OK, scan_field::in_value, ir_dtmcontrol, jtag_add_dr_scan(), jtag_add_ir_scan(), jtag_execute_queue(), LOG_DEBUG, LOG_ERROR, NULL, scan_field::num_bits, scan_field::out_value, select_dmi_via_bscan(), select_user4, and TAP_IDLE.

Referenced by dtmcs_scan().

◆ ebreak_config_to_tcl_dict()

static int ebreak_config_to_tcl_dict	(	const struct riscv_private_config *	config,
		char *	buffer
	)

static

Obtain dcsr.ebreak* configuration as a Tcl dictionary.

Print the resulting string to the "buffer" and return the string length. The "buffer" can be NULL, in which case only the length is computed but nothing is written.

Definition at line 577 of file riscv.c.

References buffer, config, jim_nvp_value2name_simple(), mode, N_RISCV_MODE, jim_nvp::name, NULL, nvp_ebreak_config_opts, and nvp_ebreak_mode_opts.

Referenced by jim_report_ebreak_config().

◆ enable_watchpoints()

static int enable_watchpoints	(	struct target *	target,
		bool *	wp_is_set
	)

static

Definition at line 2808 of file riscv.c.

References ERROR_FAIL, ERROR_OK, LOG_TARGET_DEBUG, watchpoint::next, riscv_add_watchpoint(), watchpoint::unique_id, and target::watchpoints.

Referenced by riscv_openocd_step_impl().

◆ fill_match_triggers_tdata1_fields_t2()

static struct match_triggers_tdata1_fields fill_match_triggers_tdata1_fields_t2	(	struct target *	target,
		struct trigger *	trigger
	)

static

Definition at line 1104 of file riscv.c.

References CSR_MCONTROL_TYPE, ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, find_next_free_trigger(), get_field(), LOG_TARGET_DEBUG, log_trigger_request_info(), RISCV_INFO, riscv_xlen(), set_trigger(), t1, t2, try_use_trigger_and_cache_result(), and trigger::unique_id.

Referenced by add_trigger().

◆ fill_match_triggers_tdata1_fields_t6()

static struct match_triggers_tdata1_fields fill_match_triggers_tdata1_fields_t6	(	struct target *	target,
		struct trigger *	trigger
	)

static

Definition at line 1104 of file riscv.c.

Referenced by add_trigger().

◆ find_first_trigger_by_id()

static int find_first_trigger_by_id	(	struct target *	target,
		int	unique_id
	)

static

Definition at line 820 of file riscv.c.

References RISCV_INFO.

Referenced by COMMAND_HANDLER(), COMMAND_HELPER(), riscv_add_breakpoint(), and riscv_add_watchpoint().

◆ find_next_free_trigger()

static int find_next_free_trigger	(	struct target *	target,
		int	type,
		bool	chained,
		unsigned int *	idx
	)

static

Definition at line 785 of file riscv.c.

References ERROR_FAIL, ERROR_OK, LOG_TARGET_DEBUG, RISCV_INFO, and type.

Referenced by fill_match_triggers_tdata1_fields_t2(), maybe_add_trigger_t1(), maybe_add_trigger_t3(), maybe_add_trigger_t4(), maybe_add_trigger_t5(), and try_setup_single_match_trigger().

◆ free_wp_triggers_cache()

static void free_wp_triggers_cache ( struct target * target )

static

Definition at line 697 of file riscv.c.

References tdata1_cache::elem_tdata1, tdata2_cache::elem_tdata2, list_del(), list_for_each_entry_safe, RISCV_INFO, and tdata1_cache::tdata2_cache_head.

Referenced by riscv_deinit_target().

◆ get_loadstore_membase_regno()

static int get_loadstore_membase_regno	(	struct target *	target,
		const riscv_insn_t	instruction,
		int *	regid
	)

static

Definition at line 2036 of file riscv.c.

References ERROR_FAIL, ERROR_OK, GDB_REGNO_SP, get_field32(), get_opcode(), get_rs1_c(), INSN_FIELD_FUNCT3, INSN_FIELD_RS1, LOG_TARGET_DEBUG, MATCH_C_FLD, MATCH_C_FLDSP, MATCH_C_FLW, MATCH_C_FSD, MATCH_C_FSDSP, MATCH_C_FSW, MATCH_C_LDSP, MATCH_C_LW, MATCH_C_LWSP, MATCH_C_SDSP, MATCH_C_SW, MATCH_C_SWSP, MATCH_FLH, MATCH_FSH, MATCH_LB, MATCH_SB, and rs.

Referenced by riscv_hit_watchpoint().

◆ get_loadstore_memoffset()

static int get_loadstore_memoffset	(	struct target *	target,
		const riscv_insn_t	instruction,
		int16_t *	memoffset
	)

static

Definition at line 2077 of file riscv.c.

References ERROR_FAIL, ERROR_OK, get_field32(), get_offset_cld(), get_offset_cldsp(), get_offset_clq(), get_offset_clqsp(), get_offset_clw(), get_offset_clwsp(), get_offset_csdsp(), get_offset_csqsp(), get_offset_cswsp(), get_opcode(), INSN_FIELD_FUNCT3, INSN_FIELD_IMM12, INSN_FIELD_IMM12HI, INSN_FIELD_IMM12LO, LOG_TARGET_DEBUG, MATCH_C_FLD, MATCH_C_FLDSP, MATCH_C_FLW, MATCH_C_FSD, MATCH_C_FSDSP, MATCH_C_FSW, MATCH_C_LDSP, MATCH_C_LW, MATCH_C_LWSP, MATCH_C_SDSP, MATCH_C_SW, MATCH_C_SWSP, MATCH_FLH, MATCH_FSH, MATCH_LB, MATCH_SB, offset, and riscv_xlen().

Referenced by riscv_hit_watchpoint().

◆ get_offset_cld()

static uint16_t get_offset_cld ( riscv_insn_t instruction )

static

Definition at line 1974 of file riscv.c.

References get_field32(), INSN_FIELD_C_UIMM8HI, and INSN_FIELD_C_UIMM8LO.

Referenced by get_loadstore_memoffset().

◆ get_offset_cldsp()

static uint16_t get_offset_cldsp ( riscv_insn_t instruction )

static

Definition at line 1932 of file riscv.c.

References get_field32(), INSN_FIELD_C_UIMM9SPHI, and INSN_FIELD_C_UIMM9SPLO.

Referenced by get_loadstore_memoffset().

◆ get_offset_clq()

static uint16_t get_offset_clq ( riscv_insn_t instruction )

static

Definition at line 1982 of file riscv.c.

References get_field32(), INSN_FIELD_C_UIMM9HI, and INSN_FIELD_C_UIMM9LO.

Referenced by get_loadstore_memoffset().

◆ get_offset_clqsp()

static uint16_t get_offset_clqsp ( riscv_insn_t instruction )

static

Definition at line 1994 of file riscv.c.

References get_field32(), INSN_FIELD_C_UIMM10SPHI, and INSN_FIELD_C_UIMM10SPLO.

Referenced by get_loadstore_memoffset().

◆ get_offset_clw()

static uint16_t get_offset_clw ( riscv_insn_t instruction )

static

Definition at line 1964 of file riscv.c.

References get_field32(), INSN_FIELD_C_UIMM7HI, and INSN_FIELD_C_UIMM7LO.

Referenced by get_loadstore_memoffset().

◆ get_offset_clwsp()

static uint16_t get_offset_clwsp ( riscv_insn_t instruction )

static

These functions are needed to extract individual bits (for offset) from the instruction.

Definition at line 1920 of file riscv.c.

References get_field32(), INSN_FIELD_C_UIMM8SPHI, and INSN_FIELD_C_UIMM8SPLO.

Referenced by get_loadstore_memoffset().

◆ get_offset_csdsp()

static uint16_t get_offset_csdsp ( riscv_insn_t instruction )

static

Definition at line 1954 of file riscv.c.

References get_field32(), and INSN_FIELD_C_UIMM9SP_S.

Referenced by get_loadstore_memoffset().

◆ get_offset_csqsp()

static uint16_t get_offset_csqsp ( riscv_insn_t instruction )

static

Definition at line 2005 of file riscv.c.

References get_field32(), and INSN_FIELD_C_UIMM10SP_S.

Referenced by get_loadstore_memoffset().

◆ get_offset_cswsp()

static uint16_t get_offset_cswsp ( riscv_insn_t instruction )

static

Definition at line 1944 of file riscv.c.

References get_field32(), and INSN_FIELD_C_UIMM8SP_S.

Referenced by get_loadstore_memoffset().

◆ get_opcode()

static uint32_t get_opcode ( const riscv_insn_t instruction )

static

Definition at line 2025 of file riscv.c.

References INSN_FIELD_OPCODE, and MASK_C_LD.

Referenced by get_loadstore_membase_regno(), get_loadstore_memoffset(), and verify_loadstore().

◆ get_rs1_c()

static uint32_t get_rs1_c ( riscv_insn_t instruction )

static

Decode rs1' register num for RVC.

See "Table: Registers specified by the three-bit rs1′, rs2′, and rd′ fields of the CIW, CL, CS, CA, and CB formats" in "The RISC-V Instruction Set Manual Volume I: Unprivileged ISA".

Definition at line 2020 of file riscv.c.

References GDB_REGNO_S0, get_field32(), and INSN_FIELD_C_SREG1.

Referenced by get_loadstore_membase_regno().

◆ get_target_type()

static struct target_type* get_target_type ( struct target * target )

static

Definition at line 456 of file riscv.c.

References target::arch_info, DTM_DTMCS_VERSION_0_11, DTM_DTMCS_VERSION_1_0, info, LOG_TARGET_ERROR, NULL, riscv011_target, riscv013_target, and RISCV_INFO.

Referenced by halt_go(), oldriscv_poll(), oldriscv_step(), resume_go(), riscv_arch_state(), riscv_assert_reset(), riscv_deassert_reset(), riscv_deinit_target(), riscv_examine(), and riscv_halt().

◆ get_trigger_types()

static int get_trigger_types	(	struct target *	target,
		unsigned int *	trigger_tinfo,
		riscv_reg_t	tdata1
	)

static

This function reads tinfo or tdata1, when reading tinfo fails, to determine trigger types supported by a trigger.

It is assumed that the trigger is already selected via writing tselect.

Definition at line 6158 of file riscv.c.

References CSR_TDATA1_TYPE, ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, GDB_REGNO_TINFO, get_field(), riscv_reg_get(), riscv_xlen(), and type.

Referenced by riscv_enumerate_triggers().

◆ halt_finish()

static int halt_finish ( struct target * target )

static

Definition at line 2703 of file riscv.c.

References target_call_event_callbacks(), and TARGET_EVENT_HALTED.

Referenced by riscv_halt().

◆ halt_go()

static int halt_go ( struct target * target )

static

Definition at line 2685 of file riscv.c.

References DBG_REASON_DBGRQ, DBG_REASON_NOTHALTED, target::debug_reason, ERROR_FAIL, get_target_type(), target_type::halt, riscv_halt_go_all_harts(), and RISCV_INFO.

Referenced by riscv_halt().

◆ halt_prep()

static int halt_prep ( struct target * target )

static

Definition at line 2636 of file riscv.c.

References target::debug_reason, ERROR_FAIL, ERROR_OK, LOG_TARGET_DEBUG, RISCV_INFO, target::state, TARGET_HALTED, and TARGET_UNAVAILABLE.

Referenced by riscv_halt().

◆ jim_configure_ebreak()

static int jim_configure_ebreak	(	struct riscv_private_config *	config,
		struct jim_getopt_info *	goi
	)

static

Definition at line 528 of file riscv.c.

References jim_getopt_info::argc, jim_getopt_info::argv, config, jim_getopt_info::interp, jim_getopt_nvp(), jim_getopt_nvp_unknown(), jim_getopt_obj(), jim_nvp_name2value_obj(), N_RISCV_MODE, NULL, nvp_ebreak_config_opts, nvp_ebreak_mode_opts, and jim_nvp::value.

Referenced by riscv_jim_configure().

◆ jim_report_ebreak_config()

static int jim_report_ebreak_config	(	const struct riscv_private_config *	config,
		Jim_Interp *	interp
	)

static

Definition at line 599 of file riscv.c.

References config, ebreak_config_to_tcl_dict(), LOG_ERROR, and NULL.

Referenced by riscv_jim_configure().

◆ log_trigger_request_info()

static void log_trigger_request_info ( struct trigger_request_info trig_info )

static

Definition at line 979 of file riscv.c.

References LOG_DEBUG, trigger_request_info::tdata1, and trigger_request_info::tdata2.

Referenced by fill_match_triggers_tdata1_fields_t2(), and try_setup_single_match_trigger().

◆ maybe_add_trigger_t1()

static int maybe_add_trigger_t1	(	struct target *	target,
		struct trigger *	trigger
	)

static

Definition at line 927 of file riscv.c.

References trigger::address, BIT, CSR_TDATA1_TYPE_LEGACY, ERROR_FAIL, ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, find_next_free_trigger(), GDB_REGNO_TDATA1, trigger::is_execute, trigger::is_read, trigger::is_write, RISCV_INFO, riscv_reg_get(), set_field(), set_trigger(), and trigger::unique_id.

Referenced by add_trigger().

◆ maybe_add_trigger_t2_t6()

static int maybe_add_trigger_t2_t6	(	struct target *	target,
		struct trigger *	trigger,
		struct match_triggers_tdata1_fields	fields
	)

static

Definition at line 1346 of file riscv.c.

References trigger::is_execute, trigger::is_read, trigger::is_write, maybe_add_trigger_t2_t6_for_bp(), and maybe_add_trigger_t2_t6_for_wp().

Referenced by add_trigger().

◆ maybe_add_trigger_t2_t6_for_bp()

static int maybe_add_trigger_t2_t6_for_bp	(	struct target *	target,
		struct trigger *	trigger,
		struct match_triggers_tdata1_fields	fields
	)

static

Definition at line 1333 of file riscv.c.

References trigger::address, match_triggers_tdata1_fields::any, match_triggers_tdata1_fields::chain, match_triggers_tdata1_fields::common, match_triggers_tdata1_fields::disable, match_triggers_tdata1_fields::eq, LOG_TARGET_DEBUG, match_triggers_tdata1_fields::match, match_triggers_tdata1_fields::size, trigger_request_info::tdata1, and try_setup_single_match_trigger().

Referenced by maybe_add_trigger_t2_t6().

◆ maybe_add_trigger_t2_t6_for_wp()

static int maybe_add_trigger_t2_t6_for_wp	(	struct target *	target,
		struct trigger *	trigger,
		struct match_triggers_tdata1_fields	fields
	)

static

◆ maybe_add_trigger_t3()

static int maybe_add_trigger_t3	(	struct target *	target,
		bool	vs,
		bool	vu,
		bool	m,
		bool	s,
		bool	u,
		bool	pending,
		unsigned int	count,
		int	unique_id
	)

static

Definition at line 1358 of file riscv.c.

References count, CSR_ICOUNT_ACTION, CSR_ICOUNT_ACTION_DEBUG_MODE, CSR_ICOUNT_COUNT, CSR_ICOUNT_DMODE, CSR_ICOUNT_M, CSR_ICOUNT_PENDING, CSR_ICOUNT_S, CSR_ICOUNT_TYPE, CSR_ICOUNT_U, CSR_ICOUNT_VS, CSR_ICOUNT_VU, CSR_TDATA1_TYPE_ICOUNT, ERROR_OK, find_next_free_trigger(), RISCV_INFO, riscv_xlen(), set_field(), set_trigger(), and trigger_request_info::tdata1.

Referenced by COMMAND_HANDLER().

◆ maybe_add_trigger_t4()

static int maybe_add_trigger_t4	(	struct target *	target,
		bool	vs,
		bool	vu,
		bool	nmi,
		bool	m,
		bool	s,
		bool	u,
		riscv_reg_t	interrupts,
		int	unique_id
	)

static

Definition at line 1390 of file riscv.c.

References CSR_ITRIGGER_ACTION, CSR_ITRIGGER_ACTION_DEBUG_MODE, CSR_ITRIGGER_DMODE, CSR_ITRIGGER_M, CSR_ITRIGGER_NMI, CSR_ITRIGGER_S, CSR_ITRIGGER_TYPE, CSR_ITRIGGER_U, CSR_ITRIGGER_VS, CSR_ITRIGGER_VU, CSR_TDATA1_TYPE_ITRIGGER, ERROR_OK, find_next_free_trigger(), RISCV_INFO, riscv_xlen(), set_field(), set_trigger(), trigger_request_info::tdata1, and trigger_request_info::tdata2.

Referenced by COMMAND_HANDLER().

◆ maybe_add_trigger_t5()

static int maybe_add_trigger_t5	(	struct target *	target,
		bool	vs,
		bool	vu,
		bool	m,
		bool	s,
		bool	u,
		riscv_reg_t	exception_codes,
		int	unique_id
	)

static

Definition at line 1423 of file riscv.c.

References CSR_ETRIGGER_ACTION, CSR_ETRIGGER_ACTION_DEBUG_MODE, CSR_ETRIGGER_DMODE, CSR_ETRIGGER_M, CSR_ETRIGGER_S, CSR_ETRIGGER_TYPE, CSR_ETRIGGER_U, CSR_ETRIGGER_VS, CSR_ETRIGGER_VU, CSR_TDATA1_TYPE_ETRIGGER, ERROR_OK, find_next_free_trigger(), RISCV_INFO, riscv_xlen(), set_field(), set_trigger(), trigger_request_info::tdata1, and trigger_request_info::tdata2.

Referenced by COMMAND_HANDLER().

◆ old_or_new_riscv_poll()

static int old_or_new_riscv_poll ( struct target * target )

static

Definition at line 2520 of file riscv.c.

Referenced by riscv_run_algorithm().

◆ old_or_new_riscv_step()

static int old_or_new_riscv_step	(	struct target *	target,
		bool	current,
		target_addr_t	address,
		bool	handle_breakpoints
	)

static

Definition at line 2465 of file riscv.c.

References address, and old_or_new_riscv_step_impl().

◆ old_or_new_riscv_step_impl()

static int old_or_new_riscv_step_impl	(	struct target *	target,
		bool	current,
		target_addr_t	address,
		bool	handle_breakpoints,
		int	handle_callbacks
	)

static

Definition at line 2452 of file riscv.c.

References address, LOG_TARGET_DEBUG, oldriscv_step(), RISCV_INFO, and riscv_openocd_step_impl().

Referenced by old_or_new_riscv_step(), and resume_prep().

◆ oldriscv_poll()

static int oldriscv_poll ( struct target * target )

static

Definition at line 2512 of file riscv.c.

References ERROR_FAIL, get_target_type(), and target_type::poll.

Referenced by derive_debug_reason_without_hitbit().

◆ oldriscv_step()

static int oldriscv_step	(	struct target *	target,
		bool	current,
		uint32_t	address,
		bool	handle_breakpoints
	)

static

Definition at line 2440 of file riscv.c.

References address, ERROR_FAIL, get_target_type(), and target_type::step.

Referenced by old_or_new_riscv_step_impl().

◆ parse_csr_address()

static bool parse_csr_address	(	const char *	reg_address_str,
		unsigned int *	reg_addr
	)

static

Definition at line 4379 of file riscv.c.

Referenced by parse_reg_ranges_impl().

◆ parse_reg_ranges()

static int parse_reg_ranges	(	struct list_head *	ranges,
		const char *	tcl_arg,
		const char *	reg_type,
		unsigned int	max_val
	)

static

Definition at line 4522 of file riscv.c.

References ERROR_FAIL, LOG_ERROR, NULL, and parse_reg_ranges_impl().

Referenced by COMMAND_HANDLER().

◆ parse_reg_ranges_impl()

static int parse_reg_ranges_impl	(	struct list_head *	ranges,
		char *	args,
		const char *	reg_type,
		unsigned int	max_val,
		char **const	name_buffer
	)

static

Definition at line 4409 of file riscv.c.

References ERROR_COMMAND_SYNTAX_ERROR, ERROR_FAIL, ERROR_OK, list_add(), list_for_each_entry, LOG_ERROR, LOG_WARNING, low, range_list_t::low, MAX, name, range_list_t::name, NULL, and parse_csr_address().

Referenced by parse_reg_ranges().

◆ read_by_given_size()

static int read_by_given_size	(	struct target *	target,
		target_addr_t	address,
		uint32_t	size,
		uint8_t *	buffer,
		uint32_t	access_size
	)

static

Read one memory item of given "size".

Use memory access of given "access_size". Read larger section of memory and pick out the required portion, if needed.

Definition at line 1520 of file riscv.c.

References address, buffer, ERROR_FAIL, ERROR_OK, size, and target_read_memory().

Referenced by riscv_read_by_any_size().

◆ remove_trigger()

static int remove_trigger	(	struct target *	target,
		int	unique_id
	)

static

Definition at line 1658 of file riscv.c.

References ERROR_FAIL, ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, GDB_REGNO_TDATA1, GDB_REGNO_TSELECT, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, riscv_enumerate_triggers(), RISCV_INFO, riscv_reg_get(), riscv_reg_set(), and trigger::unique_id.

Referenced by check_mcontrol6_hit_status(), COMMAND_HELPER(), and riscv_remove_breakpoint().

◆ resume_finish()

static int resume_finish	(	struct target *	target,
		bool	debug_execution
	)

static

Definition at line 2891 of file riscv.c.

References DBG_REASON_NOTHALTED, target::debug_reason, LOG_LVL_ERROR, LOG_TARGET_ERROR, riscv_reg_cache_any_dirty(), riscv_reg_cache_invalidate_all(), target::state, target_call_event_callbacks(), TARGET_DEBUG_RUNNING, TARGET_EVENT_DEBUG_RESUMED, TARGET_EVENT_RESUMED, TARGET_HALTED, and TARGET_RUNNING.

Referenced by riscv_resume().

◆ resume_go()

static int resume_go	(	struct target *	target,
		bool	current,
		target_addr_t	address,
		bool	handle_breakpoints,
		bool	debug_execution
	)

static

Resume all the harts that have been prepped, as close to instantaneous as possible.

Definition at line 2872 of file riscv.c.

References address, ERROR_FAIL, get_target_type(), target_type::resume, RISCV_INFO, riscv_resume_go_all_harts(), target::state, and TARGET_HALTED.

Referenced by riscv_resume().

◆ resume_prep()

static int resume_prep	(	struct target *	target,
		bool	current,
		target_addr_t	address,
		bool	handle_breakpoints,
		bool	debug_execution
	)

static

Get everything ready to resume.

Definition at line 2830 of file riscv.c.

References address, DBG_REASON_BREAKPOINT, DBG_REASON_WATCHPOINT, target::debug_reason, ERROR_FAIL, ERROR_OK, GDB_REGNO_PC, LOG_TARGET_DEBUG, old_or_new_riscv_step_impl(), RISCV_INFO, riscv_reg_set(), target::state, and TARGET_HALTED.

Referenced by riscv_resume().

◆ riscv_add_breakpoint()

static int riscv_add_breakpoint	(	struct target *	target,
		struct breakpoint *	breakpoint
	)

static

Todo:: check RVC for size/alignment

Definition at line 1607 of file riscv.c.

References add_trigger(), breakpoint::address, BKPT_HARD, BKPT_SOFT, breakpoint_hw_set(), buf_set_u32(), ebreak(), ebreak_c(), ERROR_FAIL, ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, find_first_trigger_by_id(), breakpoint::is_set, breakpoint::length, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_INFO, breakpoint::orig_instr, riscv_read_by_any_size(), riscv_write_by_any_size(), TARGET_PRIxADDR, trigger_from_breakpoint(), breakpoint::type, and breakpoint::unique_id.

Referenced by riscv_openocd_step_impl().

◆ riscv_add_bscan_tunneled_scan()

void riscv_add_bscan_tunneled_scan	(	struct jtag_tap *	tap,
		const struct scan_field *	field,
		riscv_bscan_tunneled_scan_context_t *	ctxt
	)

Definition at line 6292 of file riscv.c.

References ARRAY_SIZE, bscan_one, BSCAN_TUNNEL_DATA_REGISTER, bscan_tunnel_type, bscan_zero, scan_field::in_value, jtag_add_dr_scan(), jtag_add_ir_scan(), scan_field::num_bits, scan_field::out_value, select_user4, TAP_IDLE, riscv_bscan_tunneled_scan_context_t::tunneled_dr, and riscv_bscan_tunneled_scan_context_t::tunneled_dr_width.

Referenced by riscv_batch_run_from().

◆ riscv_add_watchpoint()

int riscv_add_watchpoint	(	struct target *	target,
		struct watchpoint *	watchpoint
	)

Definition at line 1735 of file riscv.c.

References add_trigger(), ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, find_first_trigger_by_id(), LOG_TARGET_ERROR, watchpoint::mask, trigger_from_watchpoint(), watchpoint::unique_id, WATCHPOINT_IGNORE_DATA_VALUE_MASK, and watchpoint_set().

Referenced by enable_watchpoints(), and strict_step().

◆ riscv_address_translate()

static int riscv_address_translate	(	struct target *	target,
		const virt2phys_info_t *	info,
		target_addr_t	ppn,
		const virt2phys_info_t *	extra_info,
		target_addr_t	extra_ppn,
		target_addr_t	virtual,
		target_addr_t *	physical
	)

static

Definition at line 3094 of file riscv.c.

References riscv_mem_access_args::address, buf_get_u32(), buf_get_u64(), buffer, ERROR_FAIL, ERROR_OK, info, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, mask, NULL, PTE_PPN_SHIFT, PTE_R, PTE_V, PTE_W, PTE_X, RISCV_INFO, RISCV_PGSHIFT, riscv_xlen(), and TARGET_PRIxADDR.

Referenced by riscv_virt2phys(), and riscv_virt2phys_v().

◆ riscv_arch_state()

static int riscv_arch_state ( struct target * target )

static

Definition at line 3559 of file riscv.c.

References target_type::arch_state, debug_reason_name(), ERROR_FAIL, get_target_type(), semihosting::is_active, LOG_USER, target::semihosting, target::state, TARGET_HALTED, and target_name().

◆ riscv_assert_reset()

static int riscv_assert_reset ( struct target * target )

static

Definition at line 2757 of file riscv.c.

References target_type::assert_reset, ERROR_FAIL, get_target_type(), LOG_LVL_INFO, LOG_TARGET_DEBUG, LOG_TARGET_INFO, riscv_reg_cache_any_dirty(), and riscv_reg_cache_invalidate_all().

◆ riscv_checksum_memory()

static int riscv_checksum_memory	(	struct target *	target,
		target_addr_t	address,
		uint32_t	count,
		uint32_t *	checksum
	)

static

Definition at line 3744 of file riscv.c.

References address, working_area::address, buf_get_u32(), buf_set_u64(), count, destroy_reg_param(), ERROR_FAIL, ERROR_OK, init_reg_param(), LOG_TARGET_DEBUG, LOG_TARGET_ERROR, NULL, PARAM_IN_OUT, PARAM_OUT, riscv_xlen(), working_area::size, TARGET_ADDR_FMT, target_alloc_working_area(), target_free_working_area(), TARGET_PRIxADDR, target_run_algorithm(), target_write_buffer(), and reg_param::value.

◆ riscv_create_target()

static int riscv_create_target ( struct target * target )

static

Definition at line 492 of file riscv.c.

◆ riscv_data_bits()

static unsigned int riscv_data_bits ( struct target * target )

static

Definition at line 5884 of file riscv.c.

References RISCV_INFO, and riscv_xlen().

◆ riscv_deassert_reset()

static int riscv_deassert_reset ( struct target * target )

static

Definition at line 2771 of file riscv.c.

References target_type::deassert_reset, ERROR_FAIL, get_target_type(), and LOG_TARGET_DEBUG.

◆ riscv_deinit_target()

static void riscv_deinit_target ( struct target * target )

static

Definition at line 716 of file riscv.c.

References target::arch_info, target_type::deinit_target, ERROR_OK, free_wp_triggers_cache(), get_target_type(), info, list_for_each_entry_safe, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, range_list_t::name, NULL, target::private_config, riscv_reg_flush_all(), and riscv_reg_free_all().

◆ riscv_dmi_read()

static int riscv_dmi_read	(	struct target *	target,
		uint32_t *	value,
		uint32_t	address
	)

static

Definition at line 4658 of file riscv.c.

References address, ERROR_FAIL, LOG_ERROR, LOG_TARGET_ERROR, and RISCV_INFO.

Referenced by COMMAND_HANDLER().

◆ riscv_dmi_write()

static int riscv_dmi_write	(	struct target *	target,
		uint32_t	dmi_address,
		uint32_t	value
	)

static

Definition at line 4676 of file riscv.c.

References DM_DMCONTROL, DM_DMCONTROL_DMACTIVE, DM_PROGBUF0, DM_PROGBUF15, ERROR_FAIL, LOG_ERROR, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, riscv_get_dmi_address(), and RISCV_INFO.

Referenced by COMMAND_HANDLER().

◆ riscv_effective_privilege_mode()

static int riscv_effective_privilege_mode	(	struct target *	target,
		int *	v_mode,
		int *	effective_mode
	)

static

Definition at line 2990 of file riscv.c.

References ERROR_FAIL, ERROR_OK, GDB_REGNO_MSTATUS, GDB_REGNO_PRIV, get_field(), LOG_TARGET_DEBUG, LOG_TARGET_ERROR, MSTATUS_MPP, MSTATUS_MPRV, priv, riscv_reg_get(), VIRT_PRIV_PRV, and VIRT_PRIV_V.

Referenced by riscv_mmu().

◆ riscv_enumerate_triggers()

int riscv_enumerate_triggers ( struct target * target )

Count triggers, and initialize trigger_count for each hart.

trigger_count is initialized even if this function fails to discover something. Disable any hardware triggers that have dmode set. We can't have set them ourselves. Maybe they're left over from some killed debug session.

Definition at line 6216 of file riscv.c.

References ARRAY_SIZE, check_if_trigger_exists(), create_wp_trigger_cache(), CSR_TINFO_VERSION, disable_trigger_if_dmode(), ERROR_FAIL, ERROR_OK, ERROR_TARGET_NOT_HALTED, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, GDB_REGNO_TDATA1, GDB_REGNO_TINFO, GDB_REGNO_TSELECT, get_field(), get_trigger_types(), LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_INFO, NULL, RISCV_INFO, riscv_reg_get(), riscv_reg_set(), RISCV_TINFO_VERSION_UNKNOWN, target::state, and TARGET_HALTED.

Referenced by add_trigger(), COMMAND_HANDLER(), COMMAND_HELPER(), handle_halt(), remove_trigger(), and riscv_openocd_step_impl().

◆ riscv_examine()

static int riscv_examine ( struct target * target )

static

Definition at line 2472 of file riscv.c.

References DTM_DTMCS_VERSION_UNKNOWN, DTMCONTROL_VERSION, dtmcs_scan(), ERROR_FAIL, ERROR_OK, target_type::examine, get_field(), get_target_type(), info, target_type::init_target, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, RISCV_INFO, target::tap, and target_was_examined().

◆ riscv_execute_progbuf()

int riscv_execute_progbuf	(	struct target *	target,
		uint32_t *	cmderr
	)

Definition at line 6107 of file riscv.c.

References RISCV_INFO.

Referenced by riscv_program_exec().

◆ riscv_fill_dm_nop()

void riscv_fill_dm_nop	(	const struct target *	target,
		uint8_t *	buf
	)

Definition at line 6125 of file riscv.c.

References RISCV_INFO.

Referenced by riscv_batch_add_dmi_read(), riscv_batch_add_dmi_write(), and riscv_batch_add_nop().

◆ riscv_fill_dmi_read()

void riscv_fill_dmi_read	(	const struct target *	target,
		uint8_t *	buf,
		uint32_t	a
	)

Definition at line 6119 of file riscv.c.

References RISCV_INFO.

Referenced by riscv_batch_add_dmi_read().

◆ riscv_fill_dmi_write()

void riscv_fill_dmi_write	(	const struct target *	target,
		uint8_t *	buf,
		uint32_t	a,
		uint32_t	d
	)

Definition at line 6113 of file riscv.c.

References RISCV_INFO.

Referenced by riscv_batch_add_dmi_write().

◆ riscv_get_command_timeout_sec()

int riscv_get_command_timeout_sec ( void )

Definition at line 179 of file riscv.c.

References MAX, riscv_command_timeout_sec_value, and riscv_reset_timeout_sec.

Referenced by batch_run_timeout(), deassert_reset(), full_step(), read_sbcs_nonbusy(), reset_dm(), wait_for_authbusy(), wait_for_debugint_clear(), wait_for_idle(), and wait_for_state().

◆ riscv_get_dmi_address()

uint32_t riscv_get_dmi_address	(	const struct target *	target,
		uint32_t	dm_address
	)

Definition at line 4649 of file riscv.c.

References RISCV_INFO.

Referenced by COMMAND_HANDLER(), decode_dmi(), riscv_batch_add_dm_read(), riscv_batch_add_dm_write(), and riscv_dmi_write().

◆ riscv_get_dmi_address_bits()

unsigned int riscv_get_dmi_address_bits ( const struct target * target )

Definition at line 6131 of file riscv.c.

References RISCV_INFO.

Referenced by get_dmi_scan_length(), and log_batch().

◆ riscv_get_gdb_arch()

static const char* riscv_get_gdb_arch ( const struct target * target )

static

Definition at line 3489 of file riscv.c.

References LOG_TARGET_ERROR, NULL, and riscv_xlen().

◆ riscv_get_gdb_reg_list()

static int riscv_get_gdb_reg_list	(	struct target *	target,
		struct reg **	reg_list[],
		int *	reg_list_size,
		enum target_register_class	reg_class
	)

static

Definition at line 3551 of file riscv.c.

References riscv_get_gdb_reg_list_internal().

◆ riscv_get_gdb_reg_list_internal()

static int riscv_get_gdb_reg_list_internal	(	struct target *	target,
		struct reg **	reg_list[],
		int *	reg_list_size,
		enum target_register_class	reg_class,
		bool	is_read
	)

static

Definition at line 3501 of file riscv.c.

References ERROR_FAIL, ERROR_OK, reg::exist, reg_arch_type::get, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, reg_cache::num_regs, target::reg_cache, REG_CLASS_ALL, REG_CLASS_GENERAL, reg_cache::reg_list, reg::size, reg::type, and reg::valid.

Referenced by riscv_get_gdb_reg_list(), and riscv_get_gdb_reg_list_noread().

◆ riscv_get_gdb_reg_list_noread()

static int riscv_get_gdb_reg_list_noread	(	struct target *	target,
		struct reg **	reg_list[],
		int *	reg_list_size,
		enum target_register_class	reg_class
	)

static

Definition at line 3543 of file riscv.c.

References riscv_get_gdb_reg_list_internal().

◆ riscv_get_hart_state()

int riscv_get_hart_state	(	struct target *	target,
		enum riscv_hart_state *	state
	)

Definition at line 6072 of file riscv.c.

References RISCV_INFO, and state.

Referenced by examine(), riscv_halt_go_all_harts(), and riscv_poll_hart().

◆ riscv_halt()

int riscv_halt ( struct target * target )

Definition at line 2708 of file riscv.c.

References ERROR_FAIL, ERROR_OK, foreach_smp_target, get_target_type(), target_type::halt, halt_finish(), halt_go(), halt_prep(), LOG_TARGET_DEBUG, riscv_info::prepped, riscv_info(), RISCV_INFO, target::smp, target::smp_targets, and target_list::target.

Referenced by riscv013_step_or_resume_current_hart(), riscv_openocd_poll(), and riscv_run_algorithm().

◆ riscv_halt_go_all_harts()

static int riscv_halt_go_all_harts ( struct target * target )

static

Definition at line 2655 of file riscv.c.

References ERROR_FAIL, ERROR_OK, LOG_LVL_ERROR, LOG_TARGET_DEBUG, LOG_TARGET_INFO, riscv_get_hart_state(), riscv_halt_reason(), RISCV_INFO, riscv_reg_cache_any_dirty(), riscv_reg_cache_invalidate_all(), RISCV_STATE_HALTED, set_debug_reason(), state, target::state, and TARGET_HALTED.

Referenced by halt_go().

◆ riscv_halt_reason()

static enum riscv_halt_reason riscv_halt_reason ( struct target * target )

static

Definition at line 6072 of file riscv.c.

Referenced by riscv_halt_go_all_harts(), and riscv_poll_hart().

◆ riscv_hit_watchpoint()

static int riscv_hit_watchpoint	(	struct target *	target,
		struct watchpoint **	hit_watchpoint
	)

static

Definition at line 2355 of file riscv.c.

References watchpoint::address, buffer, ERROR_FAIL, ERROR_OK, GDB_REGNO_DPC, get_loadstore_membase_regno(), get_loadstore_memoffset(), length, watchpoint::length, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, watchpoint::next, RISCV_INFO, riscv_reg_get(), rs, watchpoint::rw, TARGET_PRIxADDR, target_read_buffer(), verify_loadstore(), target::watchpoints, WPT_READ, and WPT_WRITE.

◆ riscv_info_init()

static void riscv_info_init	(	struct target *	target,
		struct riscv_info *	r
	)

static

◆ riscv_init_target()

static int riscv_init_target	(	struct command_context *	cmd_ctx,
		struct target *	target
	)

static

◆ riscv_interrupts_disable()

static int riscv_interrupts_disable	(	struct target *	target,
		riscv_reg_t *	old_mstatus
	)

static

Definition at line 5997 of file riscv.c.

References ERROR_OK, GDB_REGNO_MSTATUS, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, mstatus_ie_mask, riscv_reg_get(), and riscv_reg_set().

Referenced by riscv_openocd_step_impl(), and riscv_run_algorithm().

◆ riscv_interrupts_restore()

static int riscv_interrupts_restore	(	struct target *	target,
		riscv_reg_t	old_mstatus
	)

static

Definition at line 6011 of file riscv.c.

References ERROR_OK, GDB_REGNO_MSTATUS, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, LOG_TARGET_WARNING, mstatus_ie_mask, riscv_reg_get(), and riscv_reg_set().

Referenced by riscv_openocd_step_impl(), and riscv_run_algorithm().

◆ riscv_jim_configure()

static int riscv_jim_configure	(	struct target *	target,
		struct jim_getopt_info *	goi
	)

static

Definition at line 624 of file riscv.c.

References alloc_default_riscv_private_config(), jim_getopt_info::argc, jim_getopt_info::argv, config, jim_getopt_info::interp, jim_getopt_info::is_configure, jim_configure_ebreak(), jim_getopt_obj(), jim_nvp_name2value_obj(), jim_report_ebreak_config(), NULL, nvp_config_opts, target::private_config, RISCV_CFG_EBREAK, and jim_nvp::value.

◆ riscv_mmu()

static int riscv_mmu	(	struct target *	target,
		bool *	enabled
	)

static

Definition at line 3015 of file riscv.c.

References ERROR_FAIL, ERROR_OK, GDB_REGNO_HGATP, GDB_REGNO_PRIV, GDB_REGNO_SATP, GDB_REGNO_VSATP, get_field(), HGATP_MODE_OFF, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, priv, PRV_M, riscv_effective_privilege_mode(), RISCV_HGATP_MODE, riscv_reg_get(), RISCV_SATP_MODE, riscv_virt2phys_mode_is_sw(), riscv_xlen(), and SATP_MODE_OFF.

Referenced by riscv_rw_memory(), and riscv_virt2phys().

◆ riscv_openocd_poll()

int riscv_openocd_poll ( struct target * target )

◆ riscv_openocd_step()

int riscv_openocd_step	(	struct target *	target,
		bool	current,
		target_addr_t	address,
		bool	handle_breakpoints
	)

Definition at line 4287 of file riscv.c.

References address, and riscv_openocd_step_impl().

◆ riscv_openocd_step_impl()

static int riscv_openocd_step_impl	(	struct target *	target,
		bool	current,
		target_addr_t	address,
		bool	handle_breakpoints,
		int	handle_callbacks
	)

static

◆ riscv_poll_hart()

static int riscv_poll_hart	(	struct target *	target,
		enum riscv_next_action *	next_action
	)

static

◆ riscv_progbuf_size()

unsigned int riscv_progbuf_size ( struct target * target )

Definition at line 6089 of file riscv.c.

References RISCV_INFO.

Referenced by COMMAND_HANDLER(), riscv_program_ebreak(), riscv_program_exec(), and riscv_program_insert().

◆ riscv_read_by_any_size()

int riscv_read_by_any_size	(	struct target *	target,
		target_addr_t	address,
		uint32_t	size,
		uint8_t *	buffer
	)

Read one memory item using any memory access size that will work.

Read larger section of memory and pick out the required portion, if needed.

Definition at line 1579 of file riscv.c.

References address, buffer, ERROR_FAIL, ERROR_OK, read_by_given_size(), and size.

Referenced by riscv_add_breakpoint(), and riscv_semihosting_detect_magic_sequence().

◆ riscv_read_memory()

static int riscv_read_memory	(	struct target *	target,
		target_addr_t	address,
		uint32_t	size,
		uint32_t	count,
		uint8_t *	buffer
	)

static

Definition at line 3461 of file riscv.c.

References address, riscv_mem_access_args::address, buffer, count, riscv_rw_memory(), and size.

◆ riscv_read_phys_memory()

static int riscv_read_phys_memory	(	struct target *	target,
		target_addr_t	phys_address,
		uint32_t	size,
		uint32_t	count,
		uint8_t *	buffer
	)

static

Definition at line 3372 of file riscv.c.

References riscv_mem_access_args::address, buffer, count, RISCV_INFO, and size.

Referenced by sample_memory().

◆ riscv_read_progbuf()

riscv_insn_t riscv_read_progbuf	(	struct target *	target,
		int	index
	)

Definition at line 6101 of file riscv.c.

References RISCV_INFO.

◆ riscv_remove_breakpoint()

static int riscv_remove_breakpoint	(	struct target *	target,
		struct breakpoint *	breakpoint
	)

static

Definition at line 1692 of file riscv.c.

References breakpoint::address, BKPT_HARD, BKPT_SOFT, ERROR_FAIL, ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, breakpoint::is_set, breakpoint::length, LOG_TARGET_ERROR, LOG_TARGET_INFO, breakpoint::orig_instr, remove_trigger(), riscv_write_by_any_size(), TARGET_PRIxADDR, trigger_from_breakpoint(), breakpoint::type, and trigger::unique_id.

Referenced by riscv_openocd_step_impl().

◆ riscv_remove_watchpoint()

int riscv_remove_watchpoint	(	struct target *	target,
		struct watchpoint *	watchpoint
	)

Definition at line 1755 of file riscv.c.

Referenced by disable_watchpoints(), and strict_step().

◆ riscv_resume()

static int riscv_resume	(	struct target *	target,
		bool	current,
		target_addr_t	address,
		bool	handle_breakpoints,
		bool	debug_execution,
		bool	single_hart
	)

static

single_hart When true, only resume a single hart even if SMP is: configured. This is used to run algorithms on just one hart.

Definition at line 2914 of file riscv.c.

References address, ERROR_FAIL, ERROR_OK, foreach_smp_target_direction, target_list::lh, list_add(), LOG_TARGET_DEBUG, NULL, OOCD_LIST_HEAD, riscv_info::prepped, resume_finish(), resume_go(), resume_order, resume_prep(), riscv_info(), RO_NORMAL, target::smp, target::smp_targets, target::state, target_list::target, TARGET_HALTED, TARGET_PRIxADDR, and target_state_name().

Referenced by riscv_openocd_poll(), riscv_run_algorithm(), and riscv_target_resume().

◆ riscv_resume_go_all_harts()

static int riscv_resume_go_all_harts ( struct target * target )

static

Definition at line 5983 of file riscv.c.

References ERROR_FAIL, ERROR_OK, LOG_TARGET_DEBUG, RISCV_INFO, target::state, and TARGET_HALTED.

Referenced by resume_go().

◆ riscv_run_algorithm()

static int riscv_run_algorithm	(	struct target *	target,
		int	num_mem_params,
		struct mem_param *	mem_params,
		int	num_reg_params,
		struct reg_param *	reg_params,
		target_addr_t	entry_point,
		target_addr_t	exit_point,
		unsigned int	timeout_ms,
		void *	arch_info
	)

static

Definition at line 3576 of file riscv.c.

References address, ARRAY_SIZE, buf_cpy(), buf_get_u64(), buf_set_u64(), direction, ERROR_FAIL, ERROR_OK, ERROR_TARGET_NOT_HALTED, ERROR_TARGET_TIMEOUT, GDB_REGNO_A0, GDB_REGNO_A1, GDB_REGNO_A2, GDB_REGNO_A3, GDB_REGNO_A4, GDB_REGNO_A5, GDB_REGNO_A6, GDB_REGNO_A7, GDB_REGNO_FP, GDB_REGNO_GP, GDB_REGNO_MCAUSE, GDB_REGNO_MEPC, GDB_REGNO_MSTATUS, GDB_REGNO_PC, GDB_REGNO_RA, GDB_REGNO_S1, GDB_REGNO_S10, GDB_REGNO_S11, GDB_REGNO_S2, GDB_REGNO_S3, GDB_REGNO_S4, GDB_REGNO_S5, GDB_REGNO_S6, GDB_REGNO_S7, GDB_REGNO_S8, GDB_REGNO_S9, GDB_REGNO_SP, GDB_REGNO_T0, GDB_REGNO_T1, GDB_REGNO_T2, GDB_REGNO_T3, GDB_REGNO_T4, GDB_REGNO_T5, GDB_REGNO_T6, GDB_REGNO_TP, GDB_REGNO_XPR31, reg_arch_type::get, info, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, reg::name, reg::number, old_or_new_riscv_poll(), PARAM_IN, PARAM_IN_OUT, PARAM_OUT, target::reg_cache, reg_param::reg_name, register_get_by_name(), riscv_halt(), RISCV_INFO, riscv_interrupts_disable(), riscv_interrupts_restore(), riscv_reg_gdb_regno_name(), riscv_reg_get(), riscv_resume(), reg_arch_type::set, size, reg_param::size, reg::size, start, target::state, TARGET_HALTED, TARGET_PRIxADDR, target_read_buffer(), target_write_buffer(), timeval_ms(), reg::type, reg_param::value, and reg::value.

◆ riscv_rw_memory()

static int riscv_rw_memory	(	struct target *	target,
		const struct riscv_mem_access_args	args
	)

static

◆ riscv_sample_buf_maybe_add_timestamp()

static void riscv_sample_buf_maybe_add_timestamp	(	struct target *	target,
		bool	before
	)

static

Definition at line 301 of file riscv.c.

References RISCV_INFO, RISCV_SAMPLE_BUF_TIMESTAMP_AFTER, RISCV_SAMPLE_BUF_TIMESTAMP_BEFORE, and timeval_ms().

Referenced by sample_memory().

◆ riscv_step_rtos_hart()

static int riscv_step_rtos_hart ( struct target * target )

static

Definition at line 6028 of file riscv.c.

References ERROR_FAIL, ERROR_OK, ERROR_TARGET_NOT_HALTED, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, RISCV_INFO, target::state, and TARGET_HALTED.

Referenced by riscv_openocd_step_impl().

◆ riscv_supports_extension()

bool riscv_supports_extension	(	const struct target *	target,
		char	letter
	)

Definition at line 6047 of file riscv.c.

References BIT, and RISCV_INFO.

Referenced by examine_vlenb(), fpr_read_progbuf(), fpr_write_progbuf(), gdb_regno_reg_data_type(), gdb_regno_size(), riscv013_reg_get(), riscv013_reg_set(), riscv_reg_impl_gdb_regno_exist(), and verify_loadstore().

◆ riscv_target_resume()

static int riscv_target_resume	(	struct target *	target,
		bool	current,
		target_addr_t	address,
		bool	handle_breakpoints,
		bool	debug_execution
	)

static

Definition at line 2979 of file riscv.c.

References address, ERROR_TARGET_NOT_HALTED, LOG_TARGET_ERROR, riscv_resume(), target::state, and TARGET_HALTED.

◆ riscv_trigger_detect_hit_bits()

static int riscv_trigger_detect_hit_bits	(	struct target *	target,
		int64_t *	unique_id,
		bool *	need_single_step
	)

static

Look at the trigger hit bits to find out which trigger is the reason we're halted.

Sets *unique_id to the unique ID of that trigger. If *unique_id is RISCV_TRIGGER_HIT_NOT_FOUND, no match was found.

Definition at line 1829 of file riscv.c.

References check_mcontrol6_hit_status(), CSR_ETRIGGER_HIT, CSR_ICOUNT_HIT, CSR_ITRIGGER_HIT, CSR_MCONTROL6_HIT0, CSR_MCONTROL6_HIT1, CSR_MCONTROL_HIT, CSR_TDATA1_TYPE, CSR_TDATA1_TYPE_ETRIGGER, CSR_TDATA1_TYPE_ICOUNT, CSR_TDATA1_TYPE_ITRIGGER, CSR_TDATA1_TYPE_LEGACY, CSR_TDATA1_TYPE_MCONTROL, CSR_TDATA1_TYPE_MCONTROL6, CSR_TINFO_VERSION_0, CSR_TINFO_VERSION_1, ERROR_FAIL, ERROR_OK, GDB_REGNO_TDATA1, GDB_REGNO_TSELECT, get_field(), LOG_TARGET_DEBUG, M6_HIT_BEFORE, M6_HIT_ERROR, M6_HIT_NOT_SUPPORTED, RISCV_INFO, riscv_reg_get(), riscv_reg_set(), RISCV_TINFO_VERSION_UNKNOWN, RISCV_TRIGGER_HIT_NOT_FOUND, riscv_xlen(), type, and trigger::unique_id.

Referenced by set_debug_reason().

◆ riscv_virt2phys()

static int riscv_virt2phys	(	struct target *	target,
		target_addr_t	virtual,
		target_addr_t *	physical
	)

static

Definition at line 3299 of file riscv.c.

References ERROR_FAIL, ERROR_OK, GDB_REGNO_PRIV, GDB_REGNO_SATP, get_field(), LOG_TARGET_DEBUG, LOG_TARGET_ERROR, NULL, priv, riscv_address_translate(), riscv_mmu(), riscv_reg_get(), RISCV_SATP_MODE, RISCV_SATP_PPN, riscv_virt2phys_v(), riscv_xlen(), SATP_MODE_OFF, SATP_MODE_SV32, SATP_MODE_SV39, SATP_MODE_SV48, SATP_MODE_SV57, sv32, sv39, sv48, sv57, TARGET_PRIxADDR, and VIRT_PRIV_V.

◆ riscv_virt2phys_mode_is_hw()

bool riscv_virt2phys_mode_is_hw ( const struct target * target )

Definition at line 144 of file riscv.c.

References RISCV_INFO, and RISCV_VIRT2PHYS_MODE_HW.

Referenced by modify_privilege_for_virt2phys_mode(), and restore_privilege_from_virt2phys_mode().

◆ riscv_virt2phys_mode_is_sw()

bool riscv_virt2phys_mode_is_sw ( const struct target * target )

Definition at line 151 of file riscv.c.

References RISCV_INFO, and RISCV_VIRT2PHYS_MODE_SW.

Referenced by riscv_mmu().

◆ riscv_virt2phys_mode_to_str()

const char* riscv_virt2phys_mode_to_str ( enum riscv_virt2phys_mode mode )

Definition at line 158 of file riscv.c.

References mode, RISCV_VIRT2PHYS_MODE_HW, RISCV_VIRT2PHYS_MODE_OFF, and RISCV_VIRT2PHYS_MODE_SW.

Referenced by COMMAND_HANDLER().

◆ riscv_virt2phys_v()

static int riscv_virt2phys_v	(	struct target *	target,
		target_addr_t	virtual,
		target_addr_t *	physical
	)

static

Definition at line 3189 of file riscv.c.

References ERROR_FAIL, ERROR_OK, GDB_REGNO_HGATP, GDB_REGNO_VSATP, get_field(), HGATP_MODE_OFF, HGATP_MODE_SV32X4, HGATP_MODE_SV39X4, HGATP_MODE_SV48X4, HGATP_MODE_SV57X4, LOG_TARGET_DEBUG, LOG_TARGET_ERROR, NULL, riscv_address_translate(), RISCV_HGATP_MODE, RISCV_HGATP_PPN, riscv_reg_get(), RISCV_SATP_MODE, RISCV_SATP_PPN, riscv_xlen(), SATP_MODE_OFF, SATP_MODE_SV32, SATP_MODE_SV39, SATP_MODE_SV48, SATP_MODE_SV57, sv32, sv32x4, sv39, sv39x4, sv48, sv48x4, sv57, and sv57x4.

Referenced by riscv_virt2phys().

◆ riscv_vlenb()

unsigned int riscv_vlenb ( const struct target * target )

Definition at line 6066 of file riscv.c.

References RISCV_INFO.

Referenced by gdb_regno_size(), riscv_reg_impl_init_vector_reg_type(), and vlenb_exists().

◆ riscv_write_by_any_size()

int riscv_write_by_any_size	(	struct target *	target,
		target_addr_t	address,
		uint32_t	size,
		uint8_t *	buffer
	)

Write one memory item using any memory access size that will work.

Utilize read-modify-write, if needed.

Definition at line 1547 of file riscv.c.

References address, buffer, ERROR_FAIL, ERROR_OK, size, and write_by_given_size().

Referenced by riscv_add_breakpoint(), and riscv_remove_breakpoint().

◆ riscv_write_memory()

static int riscv_write_memory	(	struct target *	target,
		target_addr_t	address,
		uint32_t	size,
		uint32_t	count,
		const uint8_t *	buffer
	)

static

Definition at line 3475 of file riscv.c.

References address, riscv_mem_access_args::address, buffer, count, riscv_rw_memory(), and size.

◆ riscv_write_phys_memory()

static int riscv_write_phys_memory	(	struct target *	target,
		target_addr_t	phys_address,
		uint32_t	size,
		uint32_t	count,
		const uint8_t *	buffer
	)

static

Definition at line 3386 of file riscv.c.

References riscv_mem_access_args::address, buffer, count, RISCV_INFO, and size.

◆ riscv_write_progbuf()

int riscv_write_progbuf	(	struct target *	target,
		unsigned int	index,
		riscv_insn_t	insn
	)

Definition at line 6095 of file riscv.c.

References RISCV_INFO.

Referenced by riscv_program_write().

◆ riscv_xlen()

unsigned int riscv_xlen ( const struct target * target )

Definition at line 6060 of file riscv.c.

References RISCV_INFO.

Referenced by cache_get(), cache_set(), check_if_trigger_exists(), check_misa_mxl(), COMMAND_HANDLER(), disable_trigger_if_dmode(), examine(), execute_resume(), fespi_write(), fill_match_triggers_tdata1_fields_t2(), fpr_read_progbuf(), fpr_write_progbuf(), gdb_regno_size(), get_loadstore_memoffset(), get_trigger_types(), handle_halt_routine(), load(), maybe_add_trigger_t3(), maybe_add_trigger_t4(), maybe_add_trigger_t5(), read_memory_progbuf_inner_extract_batch_data(), read_memory_progbuf_inner_startup(), register_size(), register_write(), riscv011_get_register(), riscv013_data_bits(), riscv_address_translate(), riscv_checksum_memory(), riscv_data_bits(), riscv_get_gdb_arch(), riscv_mmu(), riscv_reg_impl_gdb_regno_exist(), riscv_trigger_detect_hit_bits(), riscv_virt2phys(), riscv_virt2phys_v(), riscv_xlen_nonconst(), scans_add_read(), scans_new(), set_trigger(), slot_offset(), step(), store(), try_set_vsew(), try_setup_single_match_trigger(), verify_loadstore(), and write_memory_progbuf_startup().

◆ riscv_xlen_nonconst()

static unsigned int riscv_xlen_nonconst ( struct target * target )

static

Definition at line 5879 of file riscv.c.

References riscv_xlen().

◆ sample_memory()

static int sample_memory ( struct target * target )

static

Definition at line 3968 of file riscv.c.

References ARRAY_SIZE, ERROR_NOT_IMPLEMENTED, ERROR_OK, LOG_TARGET_DEBUG, LOG_TARGET_INFO, RISCV_INFO, riscv_read_phys_memory(), riscv_sample_buf_maybe_add_timestamp(), RISCV_SAMPLE_BUF_TIMESTAMP_BEFORE, start, TARGET_DEFAULT_POLLING_INTERVAL, and timeval_ms().

Referenced by riscv_openocd_poll().

◆ select_dmi_via_bscan()

void select_dmi_via_bscan ( struct jtag_tap * tap )

Definition at line 319 of file riscv.c.

References BSCAN_TUNNEL_DATA_REGISTER, bscan_tunnel_data_register_select_dmi, bscan_tunnel_data_register_select_dmi_num_fields, bscan_tunnel_nested_tap_select_dmi, bscan_tunnel_nested_tap_select_dmi_num_fields, bscan_tunnel_type, jtag_add_dr_scan(), jtag_add_ir_scan(), select_user4, and TAP_IDLE.

Referenced by dtmcs_scan_via_bscan(), and select_dmi().

◆ set_debug_reason()

static int set_debug_reason	(	struct target *	target,
		enum riscv_halt_reason	halt_reason
	)

static

Set OpenOCD's generic debug reason from the RISC-V halt reason.

Definition at line 2559 of file riscv.c.

References target::breakpoints, DBG_REASON_BREAKPOINT, DBG_REASON_DBGRQ, DBG_REASON_SINGLESTEP, DBG_REASON_UNDEFINED, DBG_REASON_WATCHPOINT, target::debug_reason, derive_debug_reason_without_hitbit(), ERROR_FAIL, ERROR_OK, GDB_REGNO_DPC, LOG_TARGET_DEBUG, breakpoint::next, watchpoint::next, RISCV_HALT_EBREAK, RISCV_HALT_ERROR, RISCV_HALT_GROUP, RISCV_HALT_INTERRUPT, RISCV_HALT_SINGLESTEP, RISCV_HALT_TRIGGER, RISCV_HALT_UNKNOWN, RISCV_INFO, riscv_reg_get(), riscv_trigger_detect_hit_bits(), RISCV_TRIGGER_HIT_NOT_FOUND, and target::watchpoints.

Referenced by riscv_halt_go_all_harts(), and riscv_poll_hart().

◆ set_trigger()

static int set_trigger	(	struct target *	target,
		unsigned int	idx,
		riscv_reg_t	tdata1,
		riscv_reg_t	tdata2
	)

static

◆ tdata1_cache_alloc()

static struct tdata1_cache* tdata1_cache_alloc	(	struct list_head *	tdata1_cache_head,
		riscv_reg_t	tdata1
	)

static

Definition at line 984 of file riscv.c.

References tdata1_cache::elem_tdata1, INIT_LIST_HEAD(), list_add_tail(), tdata1_cache::tdata1, and tdata1_cache::tdata2_cache_head.

Referenced by wp_triggers_cache_add().

◆ tdata1_cache_search()

struct tdata1_cache* tdata1_cache_search	(	struct list_head *	tdata1_cache_head,
		riscv_reg_t	find_tdata1
	)

Definition at line 1010 of file riscv.c.

References tdata1_cache::elem_tdata1, list_for_each_entry, NULL, and tdata1_cache::tdata1.

Referenced by wp_triggers_cache_add(), and wp_triggers_cache_search().

◆ tdata2_cache_alloc()

static void tdata2_cache_alloc	(	struct list_head *	tdata2_cache_head,
		riscv_reg_t	tdata2
	)

static

Definition at line 993 of file riscv.c.

References tdata2_cache::elem_tdata2, list_add(), and tdata2_cache::tdata2.

Referenced by wp_triggers_cache_add().

◆ tdata2_cache_search()

struct tdata2_cache* tdata2_cache_search	(	struct list_head *	tdata2_cache_head,
		riscv_reg_t	find_tdata2
	)

Definition at line 1000 of file riscv.c.

References tdata2_cache::elem_tdata2, list_for_each_entry, NULL, and tdata2_cache::tdata2.

Referenced by wp_triggers_cache_add(), and wp_triggers_cache_search().

◆ trigger_from_breakpoint()

static void trigger_from_breakpoint	(	struct trigger *	trigger,
		const struct breakpoint *	breakpoint
	)

static

Definition at line 762 of file riscv.c.

References breakpoint::address, trigger::address, trigger::is_execute, trigger::is_read, trigger::is_write, breakpoint::length, trigger::length, trigger::mask, breakpoint::unique_id, and trigger::unique_id.

Referenced by riscv_add_breakpoint(), and riscv_remove_breakpoint().

◆ trigger_from_watchpoint()

static void trigger_from_watchpoint	(	struct trigger *	trigger,
		const struct watchpoint *	watchpoint
	)

static

Definition at line 1721 of file riscv.c.

References watchpoint::address, trigger::address, trigger::is_execute, trigger::is_read, trigger::is_write, watchpoint::length, trigger::length, watchpoint::mask, trigger::mask, watchpoint::rw, watchpoint::unique_id, trigger::unique_id, watchpoint::value, trigger::value, WPT_ACCESS, WPT_READ, and WPT_WRITE.

Referenced by check_mcontrol6_hit_status(), and riscv_add_watchpoint().

◆ try_setup_chained_match_triggers()

static int try_setup_chained_match_triggers	(	struct target *	target,
		struct trigger *	trigger,
		struct trigger_request_info	t1,
		struct trigger_request_info	t2
	)

static

Definition at line 1104 of file riscv.c.

Referenced by maybe_add_trigger_t2_t6_for_wp().

◆ try_setup_single_match_trigger()

static int try_setup_single_match_trigger	(	struct target *	target,
		struct trigger *	trigger,
		struct trigger_request_info	trig_info
	)

static

Definition at line 1077 of file riscv.c.

References CSR_MCONTROL_TYPE, ERROR_OK, ERROR_TARGET_RESOURCE_NOT_AVAILABLE, find_next_free_trigger(), get_field(), LOG_TARGET_DEBUG, log_trigger_request_info(), RISCV_INFO, riscv_xlen(), trigger_request_info::tdata1, trigger_request_info::tdata2, try_use_trigger_and_cache_result(), and trigger::unique_id.

Referenced by maybe_add_trigger_t2_t6_for_bp(), and maybe_add_trigger_t2_t6_for_wp().

◆ try_use_trigger_and_cache_result()

static int try_use_trigger_and_cache_result	(	struct target *	target,
		unsigned int	idx,
		riscv_reg_t	tdata1,
		riscv_reg_t	tdata2
	)

static

Definition at line 1063 of file riscv.c.

References ERROR_TARGET_RESOURCE_NOT_AVAILABLE, set_trigger(), tdata2_cache::tdata2, wp_triggers_cache_add(), and wp_triggers_cache_search().

Referenced by fill_match_triggers_tdata1_fields_t2(), and try_setup_single_match_trigger().

◆ verify_loadstore()

static int verify_loadstore	(	struct target *	target,
		const riscv_insn_t	instruction,
		bool *	is_read
	)

static

Definition at line 2191 of file riscv.c.

References ERROR_FAIL, ERROR_OK, get_field32(), get_opcode(), INSN_FIELD_FUNCT3, INSN_FIELD_RD, trigger::is_read, LOG_TARGET_DEBUG, MATCH_C_FLD, MATCH_C_FLDSP, MATCH_C_FLW, MATCH_C_FSD, MATCH_C_FSDSP, MATCH_C_FSW, MATCH_C_LDSP, MATCH_C_LW, MATCH_C_LWSP, MATCH_C_SDSP, MATCH_C_SW, MATCH_C_SWSP, MATCH_FLH, MATCH_FSH, MATCH_LB, MATCH_SB, riscv_supports_extension(), riscv_xlen(), WPT_READ, and WPT_WRITE.

Referenced by riscv_hit_watchpoint().

◆ wp_triggers_cache_add()

static void wp_triggers_cache_add	(	struct target *	target,
		unsigned int	idx,
		riscv_reg_t	tdata1,
		riscv_reg_t	tdata2,
		int	error_code
	)

static

Definition at line 1030 of file riscv.c.

References tdata2_cache::elem_tdata2, list_move(), RISCV_INFO, tdata1_cache::tdata1, tdata1_cache_alloc(), tdata1_cache_search(), tdata2_cache::tdata2, tdata2_cache_alloc(), tdata1_cache::tdata2_cache_head, and tdata2_cache_search().

Referenced by try_use_trigger_and_cache_result().

◆ wp_triggers_cache_search()

static bool wp_triggers_cache_search	(	struct target *	target,
		unsigned int	idx,
		riscv_reg_t	tdata1,
		riscv_reg_t	tdata2
	)

static

Definition at line 1048 of file riscv.c.

References RISCV_INFO, tdata1_cache::tdata1, tdata1_cache_search(), tdata2_cache::tdata2, tdata1_cache::tdata2_cache_head, and tdata2_cache_search().

Referenced by try_use_trigger_and_cache_result().

◆ write_by_given_size()

static int write_by_given_size	(	struct target *	target,
		target_addr_t	address,
		uint32_t	size,
		uint8_t *	buffer,
		uint32_t	access_size
	)

static

Write one memory item of given "size".

Use memory access of given "access_size". Utilize read-modify-write, if needed.

Definition at line 1493 of file riscv.c.

References address, buffer, ERROR_FAIL, ERROR_OK, size, target_read_memory(), and target_write_memory().

Referenced by riscv_write_by_any_size().

Variable Documentation

◆ _bscan_tunnel_data_register_select_dmi

struct scan_field _bscan_tunnel_data_register_select_dmi[]

static

Initial value:

= {
        {
            .num_bits = 3,
            .out_value = bscan_zero,
            .in_value = NULL,
        },
        {
            .num_bits = 5, 
            .out_value = ir_dbus,
            .in_value = NULL,
        },
        {
            .num_bits = BSCAN_TUNNEL_IR_WIDTH_NBITS,
            .out_value = &bscan_tunnel_ir_width,
            .in_value = NULL,
        },
        {
            .num_bits = 1,
            .out_value = bscan_zero,
            .in_value = NULL,
        }
}

Definition at line 66 of file riscv.c.

◆ _bscan_tunnel_nested_tap_select_dmi

struct scan_field _bscan_tunnel_nested_tap_select_dmi[]

static

Initial value:

= {
        {
            .num_bits = 1,
            .out_value = bscan_zero,
            .in_value = NULL,
        },
        {
            .num_bits = BSCAN_TUNNEL_IR_WIDTH_NBITS,
            .out_value = &bscan_tunnel_ir_width,
            .in_value = NULL,
        },
        {
            .num_bits = 0, 
            .out_value = ir_dbus,
            .in_value = NULL,
        },
        {
            .num_bits = 3,
            .out_value = bscan_zero,
            .in_value = NULL,
        }
}

Definition at line 66 of file riscv.c.

◆ bscan_one

const uint8_t bscan_one[4] = {1}

static

Definition at line 64 of file riscv.c.

Referenced by dtmcs_scan_via_bscan(), and riscv_add_bscan_tunneled_scan().

◆ bscan_tunnel_data_register_select_dmi

struct scan_field* bscan_tunnel_data_register_select_dmi = _bscan_tunnel_data_register_select_dmi

static

Definition at line 121 of file riscv.c.

Referenced by riscv_init_target(), and select_dmi_via_bscan().

◆ bscan_tunnel_data_register_select_dmi_num_fields

uint32_t bscan_tunnel_data_register_select_dmi_num_fields = ARRAY_SIZE(_bscan_tunnel_data_register_select_dmi)

static

Definition at line 122 of file riscv.c.

Referenced by select_dmi_via_bscan().

◆ bscan_tunnel_ir_id

int bscan_tunnel_ir_id

static

Definition at line 61 of file riscv.c.

Referenced by COMMAND_HANDLER(), and riscv_init_target().

◆ bscan_tunnel_ir_width

uint8_t bscan_tunnel_ir_width

Definition at line 60 of file riscv.c.

Referenced by COMMAND_HANDLER(), dtmcs_scan(), dtmcs_scan_via_bscan(), riscv_batch_alloc(), riscv_batch_run_from(), riscv_init_target(), and select_dmi().

◆ bscan_tunnel_nested_tap_select_dmi

struct scan_field* bscan_tunnel_nested_tap_select_dmi = _bscan_tunnel_nested_tap_select_dmi

static

Definition at line 118 of file riscv.c.

Referenced by riscv_init_target(), and select_dmi_via_bscan().

◆ bscan_tunnel_nested_tap_select_dmi_num_fields

uint32_t bscan_tunnel_nested_tap_select_dmi_num_fields = ARRAY_SIZE(_bscan_tunnel_nested_tap_select_dmi)

static

Definition at line 119 of file riscv.c.

Referenced by select_dmi_via_bscan().

◆ bscan_tunnel_type

bscan_tunnel_type_t bscan_tunnel_type

static

Definition at line 58 of file riscv.c.

Referenced by COMMAND_HANDLER(), dtmcs_scan_via_bscan(), riscv_add_bscan_tunneled_scan(), riscv_init_target(), and select_dmi_via_bscan().

◆ bscan_zero

const uint8_t bscan_zero[4] = {0}

static

Definition at line 63 of file riscv.c.

Referenced by dtmcs_scan_via_bscan(), and riscv_add_bscan_tunneled_scan().

◆ ir_dbus

uint8_t ir_dbus[4] = {DBUS}

static

Definition at line 47 of file riscv.c.

Referenced by COMMAND_HANDLER().

◆ ir_dtmcontrol

uint8_t ir_dtmcontrol[4] = {DTMCONTROL}

static

Definition at line 42 of file riscv.c.

Referenced by COMMAND_HANDLER(), and dtmcs_scan_via_bscan().

◆ ir_idcode

uint8_t ir_idcode[4] = {0x1}

static

Definition at line 52 of file riscv.c.

Referenced by COMMAND_HANDLER().

◆ ir_user4

uint8_t ir_user4[4]

static

Definition at line 66 of file riscv.c.

Referenced by riscv_init_target().

◆ mstatus_ie_mask

const riscv_reg_t mstatus_ie_mask = MSTATUS_MIE | MSTATUS_HIE | MSTATUS_SIE | MSTATUS_UIE

static

Definition at line 297 of file riscv.c.

Referenced by riscv_interrupts_disable(), and riscv_interrupts_restore().

◆ nvp_config_opts

struct jim_nvp nvp_config_opts[]

static

Initial value:

= {
    { .name = "-ebreak", .value = RISCV_CFG_EBREAK },
    { .name = NULL, .value = RISCV_CFG_INVALID }
}

Definition at line 599 of file riscv.c.

Referenced by riscv_jim_configure().

◆ nvp_ebreak_config_opts

struct jim_nvp nvp_ebreak_config_opts[]

static

Initial value:

= {
    { .name = "m", .value = RISCV_MODE_M },
    { .name = "s", .value = RISCV_MODE_S },
    { .name = "u", .value = RISCV_MODE_U },
    { .name = "vs", .value = RISCV_MODE_VS },
    { .name = "vu", .value = RISCV_MODE_VU },
    { .name = NULL, .value = N_RISCV_MODE }
}

Definition at line 492 of file riscv.c.

Referenced by ebreak_config_to_tcl_dict(), and jim_configure_ebreak().

◆ nvp_ebreak_mode_opts

struct jim_nvp nvp_ebreak_mode_opts[]

static

Initial value:

= {
    { .name = "exception", .value = false },
    { .name = "halt", .value = true },
    { .name = NULL, .value = RISCV_EBREAK_MODE_INVALID }
}

Definition at line 492 of file riscv.c.

Referenced by ebreak_config_to_tcl_dict(), and jim_configure_ebreak().

◆

enum { ... } resume_order

Referenced by COMMAND_HANDLER(), and riscv_resume().

◆ riscv_command_handlers

const struct command_registration riscv_command_handlers[]

static

Initial value:

= {
    {
        .name = "riscv",
        .mode = COMMAND_ANY,
        .help = "RISC-V Command Group",
        .usage = "",
        .chain = riscv_exec_command_handlers
    },
    {
        .name = "arm",
        .mode = COMMAND_ANY,
        .help = "ARM Command Group",
        .usage = "",
        .chain = semihosting_common_handlers
    },
    COMMAND_REGISTRATION_DONE
}

Definition at line 5549 of file riscv.c.

◆ riscv_command_timeout_sec_value

int riscv_command_timeout_sec_value = DEFAULT_COMMAND_TIMEOUT_SEC

static

Definition at line 174 of file riscv.c.

Referenced by COMMAND_HANDLER(), and riscv_get_command_timeout_sec().

◆ riscv_exec_command_handlers

const struct command_registration riscv_exec_command_handlers[]

static

Definition at line 5549 of file riscv.c.

◆ riscv_reset_timeout_sec

int riscv_reset_timeout_sec = DEFAULT_COMMAND_TIMEOUT_SEC

static

Definition at line 177 of file riscv.c.

Referenced by COMMAND_HANDLER(), and riscv_get_command_timeout_sec().

◆ riscv_target

struct target_type riscv_target

Definition at line 5884 of file riscv.c.

◆ select_dbus

struct scan_field select_dbus

Initial value:

= {
    .in_value = NULL,
    .out_value = ir_dbus
}

Definition at line 47 of file riscv.c.

Referenced by assert_reset(), deassert_reset(), dtmcs_scan(), halt(), idcode_scan(), poll_target(), read_memory(), riscv011_resume(), riscv_init_target(), select_dmi(), step(), and write_memory().

◆ select_dtmcontrol

struct scan_field select_dtmcontrol

Initial value:

= {
    .in_value = NULL,
    .out_value = ir_dtmcontrol
}

Definition at line 42 of file riscv.c.

Referenced by dtmcs_scan(), and riscv_init_target().

◆ select_idcode

struct scan_field select_idcode

Initial value:

= {
    .in_value = NULL,
    .out_value = ir_idcode
}

Definition at line 52 of file riscv.c.

Referenced by idcode_scan(), and riscv_init_target().

◆ select_user4

struct scan_field select_user4

static

Initial value:

= {
    .in_value = NULL,
    .out_value = ir_user4
}

Definition at line 66 of file riscv.c.

Referenced by dtmcs_scan_via_bscan(), riscv_add_bscan_tunneled_scan(), riscv_init_target(), and select_dmi_via_bscan().

◆ sv32

const virt2phys_info_t sv32

static

Initial value:

= {
    .name = "Sv32",
    .va_bits = 32,
    .level = 2,
    .pte_shift = 2,
    .vpn_shift = {12, 22},
    .vpn_mask = {0x3ff, 0x3ff},
    .pte_ppn_shift = {10, 20},
    .pte_ppn_mask = {0x3ff, 0xfff},
    .pa_ppn_shift = {12, 22},
    .pa_ppn_mask = {0x3ff, 0xfff},
}

Definition at line 189 of file riscv.c.

Referenced by riscv_virt2phys(), and riscv_virt2phys_v().

◆ sv32x4

const virt2phys_info_t sv32x4

static

Initial value:

= {
    .name = "Sv32x4",
    .va_bits = 34,
    .level = 2,
    .pte_shift = 2,
    .vpn_shift = {12, 22},
    .vpn_mask = {0x3ff, 0xfff},
    .pte_ppn_shift = {10, 20},
    .pte_ppn_mask = {0x3ff, 0xfff},
    .pa_ppn_shift = {12, 22},
    .pa_ppn_mask = {0x3ff, 0xfff},
}

Definition at line 202 of file riscv.c.

Referenced by riscv_virt2phys_v().

◆ sv39

const virt2phys_info_t sv39

static

Initial value:

= {
    .name = "Sv39",
    .va_bits = 39,
    .level = 3,
    .pte_shift = 3,
    .vpn_shift = {12, 21, 30},
    .vpn_mask = {0x1ff, 0x1ff, 0x1ff},
    .pte_ppn_shift = {10, 19, 28},
    .pte_ppn_mask = {0x1ff, 0x1ff, 0x3ffffff},
    .pa_ppn_shift = {12, 21, 30},
    .pa_ppn_mask = {0x1ff, 0x1ff, 0x3ffffff},
}

Definition at line 215 of file riscv.c.

Referenced by riscv_virt2phys(), and riscv_virt2phys_v().

◆ sv39x4

const virt2phys_info_t sv39x4

static

Initial value:

= {
    .name = "Sv39x4",
    .va_bits = 41,
    .level = 3,
    .pte_shift = 3,
    .vpn_shift = {12, 21, 30},
    .vpn_mask = {0x1ff, 0x1ff, 0x7ff},
    .pte_ppn_shift = {10, 19, 28},
    .pte_ppn_mask = {0x1ff, 0x1ff, 0x3ffffff},
    .pa_ppn_shift = {12, 21, 30},
    .pa_ppn_mask = {0x1ff, 0x1ff, 0x3ffffff},
}

Definition at line 228 of file riscv.c.

Referenced by riscv_virt2phys_v().

◆ sv48

const virt2phys_info_t sv48

static

Initial value:

= {
    .name = "Sv48",
    .va_bits = 48,
    .level = 4,
    .pte_shift = 3,
    .vpn_shift = {12, 21, 30, 39},
    .vpn_mask = {0x1ff, 0x1ff, 0x1ff, 0x1ff},
    .pte_ppn_shift = {10, 19, 28, 37},
    .pte_ppn_mask = {0x1ff, 0x1ff, 0x1ff, 0x1ffff},
    .pa_ppn_shift = {12, 21, 30, 39},
    .pa_ppn_mask = {0x1ff, 0x1ff, 0x1ff, 0x1ffff},
}

Definition at line 241 of file riscv.c.

Referenced by riscv_virt2phys(), and riscv_virt2phys_v().

◆ sv48x4

const virt2phys_info_t sv48x4

static

Initial value:

= {
    .name = "Sv48x4",
    .va_bits = 50,
    .level = 4,
    .pte_shift = 3,
    .vpn_shift = {12, 21, 30, 39},
    .vpn_mask = {0x1ff, 0x1ff, 0x1ff, 0x7ff},
    .pte_ppn_shift = {10, 19, 28, 37},
    .pte_ppn_mask = {0x1ff, 0x1ff, 0x1ff, 0x1ffff},
    .pa_ppn_shift = {12, 21, 30, 39},
    .pa_ppn_mask = {0x1ff, 0x1ff, 0x1ff, 0x1ffff},
}

Definition at line 254 of file riscv.c.

Referenced by riscv_virt2phys_v().

◆ sv57

const virt2phys_info_t sv57

static

Initial value:

= {
    .name = "Sv57",
    .va_bits = 57,
    .level = 5,
    .pte_shift = 3,
    .vpn_shift = {12, 21, 30, 39, 48},
    .vpn_mask = {0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff},
    .pte_ppn_shift = {10, 19, 28, 37, 46},
    .pte_ppn_mask = {0x1ff, 0x1ff, 0x1ff, 0x1ff, 0xff},
    .pa_ppn_shift = {12, 21, 30, 39, 48},
    .pa_ppn_mask = {0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff},
}

Definition at line 267 of file riscv.c.

Referenced by riscv_virt2phys(), and riscv_virt2phys_v().

◆ sv57x4

const virt2phys_info_t sv57x4

static

Initial value:

= {
    .name = "Sv57x4",
    .va_bits = 59,
    .level = 5,
    .pte_shift = 3,
    .vpn_shift = {12, 21, 30, 39, 48},
    .vpn_mask = {0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x7ff},
    .pte_ppn_shift = {10, 19, 28, 37, 46},
    .pte_ppn_mask = {0x1ff, 0x1ff, 0x1ff, 0x1ff, 0xff},
    .pa_ppn_shift = {12, 21, 30, 39, 48},
    .pa_ppn_mask = {0x1ff, 0x1ff, 0x1ff, 0x1ff, 0xff},
}

Definition at line 280 of file riscv.c.

Referenced by riscv_virt2phys_v().

Data Structures

Macros

Enumerations

Functions

Variables

Macro Definition Documentation

◆ BSCAN_TUNNEL_IR_WIDTH_NBITS

◆ DBUS

◆ DTMCONTROL

◆ DTMCONTROL_VERSION

◆ RISCV_EBREAK_MODE_INVALID

◆ RISCV_HALT_GROUP_REPOLL_LIMIT

◆ RISCV_TRIGGER_HIT_NOT_FOUND

Enumeration Type Documentation

◆ anonymous enum

◆ mctrl6hitstatus

◆ riscv_cfg_opts

◆ riscv_next_action

Function Documentation

◆ add_trigger()

◆ alloc_default_riscv_private_config()

◆ can_use_napot_match()

◆ check_if_trigger_exists()

◆ check_mcontrol6_hit_status()

◆ check_virt_memory_access()

◆ COMMAND_HANDLER() [1/33]

◆ COMMAND_HANDLER() [2/33]

◆ COMMAND_HANDLER() [3/33]

◆ COMMAND_HANDLER() [4/33]

◆ COMMAND_HANDLER() [5/33]

◆ COMMAND_HANDLER() [6/33]

◆ COMMAND_HANDLER() [7/33]

◆ COMMAND_HANDLER() [8/33]

◆ COMMAND_HANDLER() [9/33]

◆ COMMAND_HANDLER() [10/33]

◆ COMMAND_HANDLER() [11/33]

◆ COMMAND_HANDLER() [12/33]

◆ COMMAND_HANDLER() [13/33]

◆ COMMAND_HANDLER() [14/33]

◆ COMMAND_HANDLER() [15/33]

◆ COMMAND_HANDLER() [16/33]

◆ COMMAND_HANDLER() [17/33]

◆ COMMAND_HANDLER() [18/33]

◆ COMMAND_HANDLER() [19/33]

◆ COMMAND_HANDLER() [20/33]

◆ COMMAND_HANDLER() [21/33]

◆ COMMAND_HANDLER() [22/33]

◆ COMMAND_HANDLER() [23/33]

◆ COMMAND_HANDLER() [24/33]

◆ COMMAND_HANDLER() [25/33]

◆ COMMAND_HANDLER() [26/33]

◆ COMMAND_HANDLER() [27/33]

◆ COMMAND_HANDLER() [28/33]

◆ COMMAND_HANDLER() [29/33]

◆ COMMAND_HANDLER() [30/33]

◆ COMMAND_HANDLER() [31/33]

◆ COMMAND_HANDLER() [32/33]

◆ COMMAND_HANDLER() [33/33]

◆ COMMAND_HELPER() [1/5]

◆ COMMAND_HELPER() [2/5]

◆ COMMAND_HELPER() [3/5]

◆ COMMAND_HELPER() [4/5]

◆ COMMAND_HELPER() [5/5]

◆ count_trailing_ones()

◆ create_wp_trigger_cache()

◆ derive_debug_reason_without_hitbit()

◆ disable_trigger_if_dmode()

◆ disable_watchpoints()

◆ dtmcs_scan()

◆ dtmcs_scan_via_bscan()

◆ ebreak_config_to_tcl_dict()

◆ enable_watchpoints()

◆ fill_match_triggers_tdata1_fields_t2()

◆ fill_match_triggers_tdata1_fields_t6()

◆ find_first_trigger_by_id()

◆ find_next_free_trigger()

◆ free_wp_triggers_cache()

◆ get_loadstore_membase_regno()

◆ get_loadstore_memoffset()

◆ get_offset_cld()