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OpenOCD
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Data Fields | |
| struct armv7a_cache_common | armv7a_cache |
| bool | cached |
| bool | mmu_enabled |
| int(* | read_physical_memory )(struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer) |
| uint32_t | ttbcr |
| uint32_t | ttbr [2] |
| uint32_t | ttbr_mask [2] |
| uint32_t | ttbr_range [2] |
| struct armv7a_cache_common armv7a_mmu_common::armv7a_cache |
Definition at line 81 of file armv7a.h.
Referenced by arm7a_l2x_flush_all_data(), arm7a_l2x_sanity_check(), armv7a_arch_state(), armv7a_identify_cache(), armv7a_init_arch_info(), armv7a_l1_d_cache_clean_inval_all(), armv7a_l1_d_cache_clean_virt(), armv7a_l1_d_cache_flush_virt(), armv7a_l1_d_cache_inval_virt(), armv7a_l1_d_cache_sanity_check(), armv7a_l1_i_cache_inval_virt(), armv7a_l1_i_cache_sanity_check(), armv7a_l2x_cache_clean_virt(), armv7a_l2x_cache_flush_virt(), armv7a_l2x_cache_init(), armv7a_l2x_cache_inval_virt(), COMMAND_HANDLER(), and cortex_a_post_debug_entry().
| bool armv7a_mmu_common::cached |
Definition at line 75 of file armv7a.h.
Referenced by armv7a_read_ttbcr().
| bool armv7a_mmu_common::mmu_enabled |
Definition at line 84 of file armv7a.h.
Referenced by armv7a_arch_state(), cortex_a_mmu(), and cortex_a_post_debug_entry().
| int(* armv7a_mmu_common::read_physical_memory) (struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer) |
Definition at line 81 of file armv7a.h.
Referenced by cortex_a_init_arch_info().
| uint32_t armv7a_mmu_common::ttbcr |
Definition at line 76 of file armv7a.h.
Referenced by armv7a_read_ttbcr().
| uint32_t armv7a_mmu_common::ttbr[2] |
Definition at line 77 of file armv7a.h.
Referenced by armv7a_read_ttbcr().
| uint32_t armv7a_mmu_common::ttbr_mask[2] |
Definition at line 78 of file armv7a.h.
Referenced by armv7a_read_ttbcr().
| uint32_t armv7a_mmu_common::ttbr_range[2] |
Definition at line 79 of file armv7a.h.
Referenced by armv7a_read_ttbcr().