OpenOCD
rsl10.c
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1 // SPDX-License-Identifier: GPL-2.0-or-later
2 
3 /***************************************************************************
4  * Copyright (C) 2022 by Toms StÅ«rmanis *
5  * toms.sturmanis@gmail.com *
6  ***************************************************************************/
7 
8 #ifdef HAVE_CONFIG_H
9 #include "config.h"
10 #endif
11 
12 #include <stdint.h>
13 
14 #include <helper/binarybuffer.h>
15 #include <helper/bits.h>
16 
17 #include <target/algorithm.h>
18 #include <target/arm_adi_v5.h>
19 #include <target/armv7m.h>
20 #include <target/cortex_m.h>
21 
22 #include "imp.h"
23 
24 #define RSL10_FLASH_ADDRESS_MAIN 0x00100000
25 #define RSL10_FLASH_ADDRESS_NVR1 0x00080000
26 #define RSL10_FLASH_ADDRESS_NVR2 0x00080800
27 #define RSL10_FLASH_ADDRESS_NVR3 0x00081000
28 #define RSL10_FLASH_ADDRESS_NVR4 0x00081800
29 #define RSL10_FLASH_ADDRESS_LOCK_INFO_SETTING 0x00081040
30 
31 #define RSL10_REG_ID 0x1FFFFFFC
32 
33 #define RSL10_FLASH_REG_MAIN_WRITE_UNLOCK 0x40000504
34 #define RSL10_FLASH_REG_MAIN_CTRL 0x40000508
35 #define RSL10_FLASH_REG_IF_STATUS 0x40000538
36 #define RSL10_FLASH_REG_NVR_WRITE_UNLOCK 0x40000548
37 #define RSL10_FLASH_REG_NVR_CTRL 0x4000054C
38 
39 #define RSL10_FLASH_REG_DEBUG_UNLOCK_KEY1 0x400000F0
40 #define RSL10_FLASH_REG_DEBUG_UNLOCK_KEY2 0x400000F4
41 #define RSL10_FLASH_REG_DEBUG_UNLOCK_KEY3 0x400000F8
42 #define RSL10_FLASH_REG_DEBUG_UNLOCK_KEY4 0x400000FC
43 
44 #define RSL10_NVR3_USER_KEY_OFFSET 0x40
45 
46 #define RSL10_ID 0x09010106
47 #define RSL10_FLASH_KEY_MAIN 0xDBC8264E
48 #define RSL10_FLASH_KEY_NVR 0x71B371F5
49 #define RSL10_KEY_DEBUG_LOCK 0x4C6F634B
50 
51 #define RSL10_FLASH_REG_MAIN_CTRL_LOW_W_ENABLE BIT(0)
52 #define RSL10_FLASH_REG_MAIN_CTRL_MIDDLE_W_ENABLE BIT(1)
53 #define RSL10_FLASH_REG_MAIN_CTRL_HIGH_W_ENABLE BIT(2)
54 
55 #define RSL10_FLASH_REG_NVR_CTRL_NVR1_W_ENABLE BIT(1)
56 #define RSL10_FLASH_REG_NVR_CTRL_NVR2_W_ENABLE BIT(2)
57 #define RSL10_FLASH_REG_NVR_CTRL_NVR3_W_ENABLE BIT(3)
58 
59 #define RSL10_FLASH_REG_STATUS_LOW_W_UNLOCKED BIT(0)
60 #define RSL10_FLASH_REG_STATUS_MIDDLE_W_UNLOCKED BIT(1)
61 #define RSL10_FLASH_REG_STATUS_HIGH_W_UNLOCKED BIT(2)
62 #define RSL10_FLASH_REG_STATUS_NVR1_W_UNLOCKED BIT(4)
63 #define RSL10_FLASH_REG_STATUS_NVR2_W_UNLOCKED BIT(5)
64 #define RSL10_FLASH_REG_STATUS_NVR3_W_UNLOCKED BIT(6)
65 
66 #define RSL10_ROM_CMD_WRITE_WORD_PAIR 0x3C
67 #define RSL10_ROM_CMD_WRITE_BUFFER 0x40
68 #define RSL10_ROM_CMD_ERASE_SECTOR 0x44
69 #define RSL10_ROM_CMD_ERASE_ALL 0x48
70 
71 #define FLASH_SECTOR_SIZE 0x2000
72 
73 #define RSL10_ROM_CMD_WRITE_BUFFER_MAX_SIZE FLASH_SECTOR_SIZE
74 
75 #define ALGO_STACK_POINTER_ADDR 0x20002000
76 
77 /* Used to launch flash related functions from ROM
78  * Params :
79  * r0-r2 = arguments
80  * r3 = target address in rom
81  */
82 static const uint8_t rsl10_rom_launcher_code[] = {
83 #include "../../../contrib/loaders/flash/rsl10/rom_launcher.inc"
84 };
85 
96  RSL10_FLASH_MAX_ERR_CODES /* must be the last one */
97 };
98 
99 static const char *const rsl10_error_list[] = {
100  [RSL10_FLASH_ERR_GENERAL_FAILURE] = "general failure",
101  [RSL10_FLASH_ERR_WRITE_NOT_ENABLED] = "write not enabled, protected",
102  [RSL10_FLASH_ERR_BAD_ADDRESS] = "bad address",
103  [RSL10_FLASH_ERR_ERASE_FAILED] = "erase failed",
104  [RSL10_FLASH_ERR_BAD_LENGTH] = "bad length",
105  [RSL10_FLASH_ERR_INACCESSIBLE] = "inaccessible: not powered up, or isolated",
106  [RSL10_FLASH_ERR_COPIER_BUSY] = "copier busy",
107  [RSL10_FLASH_ERR_PROG_FAILED] = "prog failed",
108 };
109 
110 static const char *rsl10_error(enum rsl10_flash_status x)
111 {
113  return "unknown";
114  return rsl10_error_list[x];
115 }
116 
117 const struct flash_driver rsl10_flash;
118 
119 struct rsl10_info {
120  unsigned int refcount;
121 
122  struct rsl10_bank {
123  struct rsl10_info *chip;
124  bool probed;
125  } bank[5];
126  struct target *target;
127 
128  unsigned int flash_size_kb;
129 };
130 
131 static bool rsl10_bank_is_probed(const struct flash_bank *bank)
132 {
133  struct rsl10_bank *nbank = bank->driver_priv;
134  assert(nbank);
135  return nbank->probed;
136 }
137 
138 static int rsl10_probe(struct flash_bank *bank);
139 
140 static int rsl10_get_probed_chip_if_halted(struct flash_bank *bank, struct rsl10_info **chip)
141 {
142  if (bank->target->state != TARGET_HALTED) {
143  LOG_ERROR("Target not halted");
145  }
146 
147  struct rsl10_bank *nbank = bank->driver_priv;
148  *chip = nbank->chip;
149 
151  return ERROR_OK;
152 
153  return rsl10_probe(bank);
154 }
155 
157 {
158  uint32_t status;
159 
160  int retval = target_read_u32(bank->target, RSL10_FLASH_REG_IF_STATUS, &status);
161  if (retval != ERROR_OK)
162  return retval;
163 
164  if (bank->base == RSL10_FLASH_ADDRESS_MAIN) {
165  for (unsigned int i = 0; i < bank->num_prot_blocks; i++)
166  bank->prot_blocks[i].is_protected = (status & (1 << i)) ? 0 : 1;
167 
168  } else {
169  uint32_t test_bit = 0;
170  switch (bank->base) {
173  break;
176  break;
179  break;
180  default:
181  break;
182  }
183 
184  bank->sectors[0].is_protected = (status & test_bit) ? 0 : 1;
185  }
186  return ERROR_OK;
187 }
188 
189 static int rsl10_protect(struct flash_bank *bank, int set, unsigned int first, unsigned int last)
190 {
191 
192  struct rsl10_info *chip;
193  int retval = rsl10_get_probed_chip_if_halted(bank, &chip);
194  if (retval != ERROR_OK)
195  return retval;
196 
197  if (bank->base == RSL10_FLASH_ADDRESS_MAIN) {
198  uint32_t status;
200  if (retval != ERROR_OK)
201  return retval;
202 
203  for (unsigned int i = first; i <= last; i++) {
204  if (set)
205  status &= ~(1 << i);
206  else
207  status |= (1 << i);
208  }
209 
211  if (retval != ERROR_OK)
212  return retval;
213 
215  if (retval != ERROR_OK)
216  return retval;
217  } else {
218  uint32_t bit = 0;
219  switch (bank->base) {
222  break;
225  break;
228  break;
229  default:
230  break;
231  }
232 
233  uint32_t status;
235  if (retval != ERROR_OK)
236  return retval;
237 
238  if (set)
239  status &= ~bit;
240  else
241  status |= bit;
242 
244  if (retval != ERROR_OK)
245  return retval;
246 
248  if (retval != ERROR_OK)
249  return retval;
250  }
251 
252  return ERROR_OK;
253 }
254 
255 static int rsl10_check_device(struct flash_bank *bank)
256 {
257  uint32_t configid;
258  int retval = target_read_u32(bank->target, RSL10_REG_ID, &configid);
259  if (retval != ERROR_OK)
260  return retval;
261 
262  if (configid != RSL10_ID) {
263  LOG_ERROR("This is not supported (RSL10) device, use other flash driver!!!");
264  return ERROR_TARGET_INVALID;
265  }
266  return ERROR_OK;
267 }
268 
269 static int rsl10_probe(struct flash_bank *bank)
270 {
271  struct rsl10_bank *nbank = bank->driver_priv;
272  struct rsl10_info *chip = nbank->chip;
273 
274  int retval = rsl10_check_device(bank);
275  if (retval != ERROR_OK)
276  return retval;
277 
278  unsigned int bank_id;
279  unsigned int num_prot_blocks = 0;
280  switch (bank->base) {
282  bank_id = 0;
283  num_prot_blocks = 3;
284  break;
286  bank_id = 1;
287  break;
289  bank_id = 2;
290  break;
292  bank_id = 3;
293  break;
294  default:
295  return ERROR_FAIL;
296  }
297 
298  uint32_t flash_page_size = 2048;
299 
300  bank->write_start_alignment = 8;
301  bank->write_end_alignment = 8;
302 
303  bank->num_sectors = bank->size / flash_page_size;
304  chip->flash_size_kb = bank->size / 1024;
305 
306  free(bank->sectors);
307  bank->sectors = NULL;
308 
309  bank->sectors = alloc_block_array(0, flash_page_size, bank->num_sectors);
310  if (!bank->sectors)
311  return ERROR_FAIL;
312 
313  free(bank->prot_blocks);
314  bank->prot_blocks = NULL;
315 
316  if (num_prot_blocks > 0) {
317  bank->num_prot_blocks = num_prot_blocks;
318  bank->prot_blocks = alloc_block_array(0, bank->num_sectors / 3 * flash_page_size, bank->num_prot_blocks);
319  if (!bank->prot_blocks)
320  return ERROR_FAIL;
321  }
322 
323  chip->bank[bank_id].probed = true;
324  return ERROR_OK;
325 }
326 
327 static int rsl10_auto_probe(struct flash_bank *bank)
328 {
330  return ERROR_OK;
331 
332  return rsl10_probe(bank);
333 }
334 
335 static int rsl10_ll_flash_erase(struct rsl10_info *chip, uint32_t address)
336 {
337  struct target *target = chip->target;
338  struct working_area *write_algorithm;
339 
340  LOG_DEBUG("erasing buffer flash address=0x%" PRIx32, address);
341 
342  int retval = target_alloc_working_area(target, sizeof(rsl10_rom_launcher_code), &write_algorithm);
343  if (retval != ERROR_OK) {
344  LOG_ERROR("Current working area 0x%x is too small! Increase working area size!", target->working_area_size);
345  return ERROR_FAIL;
346  }
347 
348  retval =
350  if (retval != ERROR_OK)
351  goto free_algorithm;
352 
353  struct reg_param reg_params[3];
354  struct armv7m_algorithm armv7m_info;
355  armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
356  armv7m_info.core_mode = ARM_MODE_THREAD;
357 
358  init_reg_param(&reg_params[0], "r0", 32, PARAM_IN_OUT); /* address */
359  init_reg_param(&reg_params[1], "r3", 32, PARAM_OUT); /* cmd */
360  init_reg_param(&reg_params[2], "sp", 32, PARAM_OUT); /* stack pointer */
361 
362  buf_set_u32(reg_params[0].value, 0, 32, address);
363  uint32_t cmd;
365  if (retval != ERROR_OK)
366  goto free_reg_params;
367  buf_set_u32(reg_params[1].value, 0, 32, cmd);
368  buf_set_u32(reg_params[2].value, 0, 32, ALGO_STACK_POINTER_ADDR);
369 
370  retval = target_run_algorithm(
371  target, 0, NULL, ARRAY_SIZE(reg_params), reg_params, write_algorithm->address,
372  write_algorithm->address + sizeof(rsl10_rom_launcher_code) - 2, 1000, &armv7m_info
373  );
374  if (retval != ERROR_OK)
375  goto free_reg_params;
376 
377  int algo_ret = buf_get_u32(reg_params[0].value, 0, 32);
378  if (algo_ret != RSL10_FLASH_ERR_NONE) {
379  LOG_ERROR("RSL10 ERASE ERROR: '%s' (%d)", rsl10_error(algo_ret), algo_ret);
381  }
382 
383 free_reg_params:
384  for (unsigned int i = 0; i < ARRAY_SIZE(reg_params); i++)
385  destroy_reg_param(&reg_params[i]);
386 
387 free_algorithm:
388  target_free_working_area(target, write_algorithm);
389  return retval;
390 }
391 
392 static int rsl10_ll_flash_write(struct rsl10_info *chip, uint32_t address, const uint8_t *buffer, uint32_t bytes)
393 {
394  struct target *target = chip->target;
395  struct working_area *write_algorithm;
396 
397  if (bytes == 8) {
398  uint32_t data;
399  data = buf_get_u32(buffer, 0, 32);
400  LOG_DEBUG("Writing 0x%" PRIx32 " to flash address=0x%" PRIx32 " bytes=0x%" PRIx32, data, address, bytes);
401  } else
402  LOG_DEBUG("Writing buffer to flash address=0x%" PRIx32 " bytes=0x%" PRIx32, address, bytes);
403 
404  /* allocate working area with flash programming code */
405  int retval = target_alloc_working_area(target, sizeof(rsl10_rom_launcher_code), &write_algorithm);
406  if (retval != ERROR_OK) {
407  LOG_ERROR("Current working area 0x%x is too small! Increase working area size!", target->working_area_size);
408  return ERROR_FAIL;
409  }
410 
411  retval =
413  if (retval != ERROR_OK)
414  goto free_algorithm;
415 
416  /* memory buffer, rounded down, to be multiple of 8 */
417  uint32_t buffer_avail = target_get_working_area_avail(target) & ~7;
418  uint32_t buffer_size = MIN(RSL10_ROM_CMD_WRITE_BUFFER_MAX_SIZE, buffer_avail);
419  struct working_area *source;
421  if (retval != ERROR_OK) {
422  LOG_ERROR("Current working area 0x%x is too small! Increase working area size!", target->working_area_size);
423  goto free_algorithm;
424  }
425 
426  struct reg_param reg_params[5];
427  struct armv7m_algorithm armv7m_info;
428  armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
429  armv7m_info.core_mode = ARM_MODE_THREAD;
430 
431  init_reg_param(&reg_params[0], "r0", 32, PARAM_IN_OUT); /* start addr, return value */
432  init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT); /* length */
433  init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT); /* data */
434  init_reg_param(&reg_params[3], "r3", 32, PARAM_OUT); /* cmd */
435  init_reg_param(&reg_params[4], "sp", 32, PARAM_OUT); /* stack pointer */
436  buf_set_u32(reg_params[4].value, 0, 32, ALGO_STACK_POINTER_ADDR);
437 
438  uint32_t cmd = 0;
439  uint32_t sent_bytes = 0;
440  uint32_t write_address = 0;
441  uint32_t bytes_to_send = 0;
442  uint32_t remaining_bytes = 0;
443 
445  if (retval != ERROR_OK)
446  goto free_everything;
447 
448  while (sent_bytes < bytes) {
449  remaining_bytes = bytes - sent_bytes;
450  bytes_to_send = remaining_bytes >= buffer_size ? buffer_size : remaining_bytes;
451 
452  retval = target_write_buffer(target, source->address, bytes_to_send, buffer + sent_bytes);
453  if (retval != ERROR_OK)
454  goto free_everything;
455 
456  write_address = address + sent_bytes;
457 
458  LOG_DEBUG(
459  "write_address: 0x%" PRIx32 ", words: 0x%" PRIx32 ", source: 0x%" PRIx64 ", cmd: 0x%" PRIx32, write_address,
460  bytes_to_send / 4, source->address, cmd
461  );
462  buf_set_u32(reg_params[0].value, 0, 32, write_address);
463  buf_set_u32(reg_params[1].value, 0, 32, bytes_to_send / 4);
464  buf_set_u32(reg_params[2].value, 0, 32, source->address);
465  buf_set_u32(reg_params[3].value, 0, 32, cmd);
466 
467  retval = target_run_algorithm(
468  target, 0, NULL, ARRAY_SIZE(reg_params), reg_params, write_algorithm->address,
469  write_algorithm->address + sizeof(rsl10_rom_launcher_code) - 2, 1000, &armv7m_info
470  );
471  if (retval != ERROR_OK)
472  goto free_everything;
473 
474  int algo_ret = buf_get_u32(reg_params[0].value, 0, 32);
475  if (algo_ret != RSL10_FLASH_ERR_NONE) {
476  LOG_ERROR("RSL10 WRITE ERROR: '%s' (%d)", rsl10_error(algo_ret), algo_ret);
478  goto free_everything;
479  }
480 
481  sent_bytes += bytes_to_send;
482  }
483 
484 free_everything:
486 
487  for (unsigned int i = 0; i < ARRAY_SIZE(reg_params); i++)
488  destroy_reg_param(&reg_params[i]);
489 
490 free_algorithm:
491  target_free_working_area(target, write_algorithm);
492 
493  return retval;
494 }
495 
496 static int rsl10_mass_erase(struct target *target)
497 {
498  struct working_area *write_algorithm;
499 
500  int retval = target_alloc_working_area(target, sizeof(rsl10_rom_launcher_code), &write_algorithm);
501  if (retval != ERROR_OK) {
502  LOG_ERROR("Current working area 0x%x is too small! Increase working area size!", target->working_area_size);
503  return ERROR_FAIL;
504  }
505 
506  retval =
508  if (retval != ERROR_OK)
509  goto free_algorithm;
510 
511  struct reg_param reg_params[3];
512  struct armv7m_algorithm armv7m_info;
513  armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
514  armv7m_info.core_mode = ARM_MODE_THREAD;
515 
516  init_reg_param(&reg_params[0], "r0", 32, PARAM_IN_OUT); /* return value */
517  init_reg_param(&reg_params[1], "r3", 32, PARAM_OUT); /* cmd */
518  init_reg_param(&reg_params[2], "sp", 32, PARAM_OUT); /* stack pointer */
519 
520  uint32_t cmd;
522  if (retval != ERROR_OK)
523  goto free_reg_params;
524  buf_set_u32(reg_params[1].value, 0, 32, cmd);
525  buf_set_u32(reg_params[2].value, 0, 32, ALGO_STACK_POINTER_ADDR);
526 
527  retval = target_run_algorithm(
528  target, 0, NULL, ARRAY_SIZE(reg_params), reg_params, write_algorithm->address,
529  write_algorithm->address + sizeof(rsl10_rom_launcher_code) - 2, 1000, &armv7m_info
530  );
531  if (retval != ERROR_OK)
532  goto free_reg_params;
533 
534  int algo_ret = buf_get_u32(reg_params[0].value, 0, 32);
535  if (algo_ret != RSL10_FLASH_ERR_NONE) {
536  LOG_ERROR("RSL10 MASS ERASE ERROR: '%s' (%d)", rsl10_error(algo_ret), algo_ret);
538  }
539 
540 free_reg_params:
541  for (unsigned int i = 0; i < ARRAY_SIZE(reg_params); i++)
542  destroy_reg_param(&reg_params[i]);
543 
544 free_algorithm:
545  target_free_working_area(target, write_algorithm);
546  return retval;
547 }
548 
549 static int rsl10_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
550 {
551  struct rsl10_info *chip;
552 
553  int retval = rsl10_get_probed_chip_if_halted(bank, &chip);
554  if (retval != ERROR_OK)
555  return retval;
556 
557  return rsl10_ll_flash_write(chip, bank->base + offset, buffer, count);
558 }
559 
560 static int rsl10_erase(struct flash_bank *bank, unsigned int first, unsigned int last)
561 {
562  LOG_INFO("erase bank: %x, %x", first, last);
563  int retval;
564  struct rsl10_info *chip;
565 
566  retval = rsl10_get_probed_chip_if_halted(bank, &chip);
567  if (retval != ERROR_OK)
568  return retval;
569 
570  for (unsigned int i = first; i <= last; i++) {
571  retval = rsl10_ll_flash_erase(chip, bank->base + i * 0x800);
572  if (retval != ERROR_OK)
573  return retval;
574  }
575 
576  return ERROR_OK;
577 }
578 
580 {
581  struct rsl10_bank *nbank = bank->driver_priv;
582  struct rsl10_info *chip = nbank->chip;
583  if (!chip)
584  return;
585 
586  chip->refcount--;
587  if (chip->refcount == 0) {
588  free(chip);
589  bank->driver_priv = NULL;
590  }
591 }
592 
593 static struct rsl10_info *rsl10_get_chip(struct target *target)
594 {
595  struct flash_bank *bank_iter;
596 
597  /* iterate over rsl10 banks of same target */
598  for (bank_iter = flash_bank_list(); bank_iter; bank_iter = bank_iter->next) {
599  if (bank_iter->driver != &rsl10_flash)
600  continue;
601 
602  if (bank_iter->target != target)
603  continue;
604 
605  struct rsl10_bank *nbank = bank_iter->driver_priv;
606  if (!nbank)
607  continue;
608 
609  if (nbank->chip)
610  return nbank->chip;
611  }
612  return NULL;
613 }
614 
615 FLASH_BANK_COMMAND_HANDLER(rsl10_flash_bank_command)
616 {
617  struct rsl10_info *chip = NULL;
618  struct rsl10_bank *nbank = NULL;
619  LOG_INFO("Creating flash @ " TARGET_ADDR_FMT, bank->base);
620 
621  switch (bank->base) {
627  break;
628  default:
629  LOG_ERROR("Invalid bank address " TARGET_ADDR_FMT, bank->base);
630  return ERROR_FAIL;
631  }
632 
633  chip = rsl10_get_chip(bank->target);
634  if (!chip) {
635  chip = calloc(1, sizeof(*chip));
636  if (!chip)
637  return ERROR_FAIL;
638 
639  chip->target = bank->target;
640  }
641 
642  switch (bank->base) {
644  nbank = &chip->bank[0];
645  break;
647  nbank = &chip->bank[1];
648  break;
650  nbank = &chip->bank[2];
651  break;
653  nbank = &chip->bank[3];
654  break;
656  nbank = &chip->bank[4];
657  break;
658  }
659  assert(nbank);
660 
661  chip->refcount++;
662  nbank->chip = chip;
663  nbank->probed = false;
664  bank->driver_priv = nbank;
665 
666  return ERROR_OK;
667 }
668 
669 COMMAND_HANDLER(rsl10_lock_command)
670 {
672 
673  if (CMD_ARGC != 4)
675 
676  struct flash_bank *bank;
678  if (retval != ERROR_OK)
679  return retval;
680 
681  LOG_INFO("Keys used: %s %s %s %s", CMD_ARGV[0], CMD_ARGV[1], CMD_ARGV[2], CMD_ARGV[3]);
682 
683  uint32_t user_key[4];
684  COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], user_key[0]);
685  COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], user_key[1]);
686  COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], user_key[2]);
687  COMMAND_PARSE_NUMBER(u32, CMD_ARGV[3], user_key[3]);
688 
689  uint8_t write_buffer[6 * 4];
691  target_buffer_set_u32_array(target, &write_buffer[4], 4, user_key);
692  /* pad the end to 64-bit word boundary */
693  memset(&write_buffer[5 * 4], bank->default_padded_value, 4);
694 
695  retval = rsl10_erase(bank, 0, 0);
696  if (retval != ERROR_OK)
697  return retval;
698 
699  retval = rsl10_write(bank, write_buffer, RSL10_NVR3_USER_KEY_OFFSET, sizeof(write_buffer));
700  if (retval != ERROR_OK) {
701  /* erase sector, if write fails, otherwise it can lock debug with wrong keys */
702  return rsl10_erase(bank, 0, 0);
703  }
704 
706  CMD, "****** WARNING ******\n"
707  "rsl10 device has been successfully prepared to lock.\n"
708  "Debug port is locked after restart.\n"
709  "Unlock with 'rsl10_unlock key0 key1 key2 key3'\n"
710  "****** ....... ******\n"
711  );
712 
713  return rsl10_protect(bank, true, 0, 0);
714 }
715 
716 COMMAND_HANDLER(rsl10_unlock_command)
717 {
718  if (CMD_ARGC != 4)
720 
722  struct cortex_m_common *cortex_m = target_to_cm(target);
723 
724  struct adiv5_dap *dap = cortex_m->armv7m.arm.dap;
725  struct adiv5_ap *ap = dap_get_ap(dap, 0);
726 
727  uint32_t user_key[4];
728  COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], user_key[0]);
729  COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], user_key[1]);
730  COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], user_key[2]);
731  COMMAND_PARSE_NUMBER(u32, CMD_ARGV[3], user_key[3]);
732 
733  uint8_t write_buffer1[4 * 4];
734  target_buffer_set_u32_array(target, write_buffer1, 4, user_key);
735  int retval = mem_ap_write_buf(ap, write_buffer1, 4, 4, RSL10_FLASH_REG_DEBUG_UNLOCK_KEY1);
736  if (retval != ERROR_OK) {
737  dap_put_ap(ap);
738  return retval;
739  }
740 
741  dap_put_ap(ap);
742 
743  uint32_t key;
745  if (retval != ERROR_OK)
746  return retval;
747  LOG_INFO("mem read: 0x%08" PRIx32, key);
748 
749  if (key == RSL10_KEY_DEBUG_LOCK) {
750  retval = command_run_line(CMD_CTX, "reset init");
751  if (retval != ERROR_OK)
752  return retval;
753 
754  struct flash_bank *bank;
756  if (retval != ERROR_OK)
757  return retval;
758 
759  retval = rsl10_protect(bank, false, 0, 0);
760  if (retval != ERROR_OK)
761  return retval;
762 
763  uint8_t write_buffer2[4 * 2];
764  target_buffer_set_u32(target, write_buffer2, 0x1);
765  /* pad the end to 64-bit word boundary */
766  memset(&write_buffer2[4], bank->default_padded_value, 4);
767 
768  /* let it fail, because sector is not erased, maybe just erase all? */
769  (void)rsl10_write(bank, write_buffer2, RSL10_NVR3_USER_KEY_OFFSET, sizeof(write_buffer2));
770  command_print(CMD, "Debug port is unlocked!");
771  }
772 
773  return ERROR_OK;
774 }
775 
776 COMMAND_HANDLER(rsl10_mass_erase_command)
777 {
778  if (CMD_ARGC)
780 
782 
783  int retval = rsl10_mass_erase(target);
784  if (retval != ERROR_OK)
785  return retval;
786 
787  command_print(CMD, "Mass erase was succesfull!");
788  return ERROR_OK;
789 }
790 
791 static const struct command_registration rsl10_exec_command_handlers[] = {
792  {
793  .name = "lock",
794  .handler = rsl10_lock_command,
795  .mode = COMMAND_EXEC,
796  .help = "Lock rsl10 debug, with passed keys",
797  .usage = "key1 key2 key3 key4",
798  },
799  {
800  .name = "unlock",
801  .handler = rsl10_unlock_command,
802  .mode = COMMAND_EXEC,
803  .help = "Unlock rsl10 debug, with passed keys",
804  .usage = "key1 key2 key3 key4",
805  },
806  {
807  .name = "mass_erase",
808  .handler = rsl10_mass_erase_command,
809  .mode = COMMAND_EXEC,
810  .help = "Mass erase all unprotected flash areas",
811  .usage = "",
812  },
814 };
815 
816 static const struct command_registration rsl10_command_handlers[] = {
817  {
818  .name = "rsl10",
819  .mode = COMMAND_ANY,
820  .help = "rsl10 flash command group",
821  .usage = "",
823  },
825 };
826 
827 const struct flash_driver rsl10_flash = {
828  .name = "rsl10",
829  .commands = rsl10_command_handlers,
830  .flash_bank_command = rsl10_flash_bank_command,
831  .erase = rsl10_erase,
832  .protect = rsl10_protect,
833  .write = rsl10_write,
834  .read = default_flash_read,
835  .probe = rsl10_probe,
836  .auto_probe = rsl10_auto_probe,
837  .erase_check = default_flash_blank_check,
838  .protect_check = rsl10_protect_check,
839  .free_driver_priv = rsl10_free_driver_priv,
840 };
void init_reg_param(struct reg_param *param, const char *reg_name, uint32_t size, enum param_direction direction)
Definition: algorithm.c:29
void destroy_reg_param(struct reg_param *param)
Definition: algorithm.c:38
@ PARAM_OUT
Definition: algorithm.h:16
@ PARAM_IN_OUT
Definition: algorithm.h:17
@ ARM_MODE_THREAD
Definition: arm.h:94
int mem_ap_read_atomic_u32(struct adiv5_ap *ap, target_addr_t address, uint32_t *value)
Synchronous read of a word from memory or a system register.
Definition: arm_adi_v5.c:266
struct adiv5_ap * dap_get_ap(struct adiv5_dap *dap, uint64_t ap_num)
Definition: arm_adi_v5.c:1189
int dap_put_ap(struct adiv5_ap *ap)
Definition: arm_adi_v5.c:1209
int mem_ap_write_buf(struct adiv5_ap *ap, const uint8_t *buffer, uint32_t size, uint32_t count, target_addr_t address)
Definition: arm_adi_v5.c:728
This defines formats and data structures used to talk to ADIv5 entities.
#define ARMV7M_COMMON_MAGIC
Definition: armv7m.h:224
Support functions to access arbitrary bits in a byte array.
static uint32_t buf_get_u32(const uint8_t *_buffer, unsigned int first, unsigned int num)
Retrieves num bits from _buffer, starting at the first bit, returning the bits in a 32-bit word.
Definition: binarybuffer.h:104
static void buf_set_u32(uint8_t *_buffer, unsigned int first, unsigned int num, uint32_t value)
Sets num bits in _buffer, starting at the first bit, using the bits in value.
Definition: binarybuffer.h:34
static int test_bit(unsigned int nr, const volatile unsigned long *addr)
test_bit - Determine whether a bit is set
Definition: bits.h:73
void command_print(struct command_invocation *cmd, const char *format,...)
Definition: command.c:443
int command_run_line(struct command_context *context, char *line)
Definition: command.c:547
#define CMD
Use this macro to access the command being handled, rather than accessing the variable directly.
Definition: command.h:141
#define CMD_ARGV
Use this macro to access the arguments for the command being handled, rather than accessing the varia...
Definition: command.h:156
#define ERROR_COMMAND_SYNTAX_ERROR
Definition: command.h:402
#define CMD_ARGC
Use this macro to access the number of arguments for the command being handled, rather than accessing...
Definition: command.h:151
#define COMMAND_PARSE_NUMBER(type, in, out)
parses the string in into out as a type, or prints a command error and passes the error code to the c...
Definition: command.h:442
#define CMD_CTX
Use this macro to access the context of the command being handled, rather than accessing the variable...
Definition: command.h:146
#define COMMAND_REGISTRATION_DONE
Use this as the last entry in an array of command_registration records.
Definition: command.h:253
@ COMMAND_ANY
Definition: command.h:42
@ COMMAND_EXEC
Definition: command.h:40
static struct cortex_m_common * target_to_cm(struct target *target)
Definition: cortex_m.h:287
uint64_t buffer
Pointer to data buffer to send over SPI.
Definition: dw-spi-helper.h:0
uint32_t buffer_size
Size of dw_spi_program::buffer.
Definition: dw-spi-helper.h:5
uint32_t address
Starting address. Sector aligned.
Definition: dw-spi-helper.h:0
uint8_t bank
Definition: esirisc.c:135
#define ERROR_FLASH_SECTOR_NOT_ERASED
Definition: flash/common.h:34
#define ERROR_FLASH_OPERATION_FAILED
Definition: flash/common.h:30
struct flash_sector * alloc_block_array(uint32_t offset, uint32_t size, unsigned int num_blocks)
Allocate and fill an array of sectors or protection blocks.
int default_flash_blank_check(struct flash_bank *bank)
Provides default erased-bank check handling.
int default_flash_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
Provides default read implementation for flash memory.
int get_flash_bank_by_addr(struct target *target, target_addr_t addr, bool check, struct flash_bank **result_bank)
Returns the flash bank located at a specified address.
struct flash_bank * flash_bank_list(void)
#define ERROR_FAIL
Definition: log.h:174
#define LOG_ERROR(expr ...)
Definition: log.h:133
#define LOG_INFO(expr ...)
Definition: log.h:127
#define LOG_DEBUG(expr ...)
Definition: log.h:110
#define ERROR_OK
Definition: log.h:168
static uint32_t bit(uint32_t value, unsigned int b)
Definition: opcodes.h:15
#define MIN(a, b)
Definition: replacements.h:22
#define RSL10_ROM_CMD_ERASE_SECTOR
Definition: rsl10.c:68
#define RSL10_FLASH_ADDRESS_NVR2
Definition: rsl10.c:26
#define RSL10_REG_ID
Definition: rsl10.c:31
static void rsl10_free_driver_priv(struct flash_bank *bank)
Definition: rsl10.c:579
static int rsl10_protect_check(struct flash_bank *bank)
Definition: rsl10.c:156
static int rsl10_auto_probe(struct flash_bank *bank)
Definition: rsl10.c:327
#define RSL10_FLASH_ADDRESS_NVR4
Definition: rsl10.c:28
#define RSL10_FLASH_REG_STATUS_NVR2_W_UNLOCKED
Definition: rsl10.c:63
#define RSL10_FLASH_KEY_NVR
Definition: rsl10.c:48
#define RSL10_FLASH_REG_NVR_WRITE_UNLOCK
Definition: rsl10.c:36
const struct flash_driver rsl10_flash
Definition: rsl10.c:117
static const struct command_registration rsl10_command_handlers[]
Definition: rsl10.c:816
FLASH_BANK_COMMAND_HANDLER(rsl10_flash_bank_command)
Definition: rsl10.c:615
static const uint8_t rsl10_rom_launcher_code[]
Definition: rsl10.c:82
static int rsl10_protect(struct flash_bank *bank, int set, unsigned int first, unsigned int last)
Definition: rsl10.c:189
#define RSL10_ROM_CMD_WRITE_BUFFER_MAX_SIZE
Definition: rsl10.c:73
#define RSL10_FLASH_REG_NVR_CTRL
Definition: rsl10.c:37
#define RSL10_FLASH_ADDRESS_MAIN
Definition: rsl10.c:24
static const char *const rsl10_error_list[]
Definition: rsl10.c:99
#define ALGO_STACK_POINTER_ADDR
Definition: rsl10.c:75
static int rsl10_erase(struct flash_bank *bank, unsigned int first, unsigned int last)
Definition: rsl10.c:560
static int rsl10_probe(struct flash_bank *bank)
Definition: rsl10.c:269
#define RSL10_ROM_CMD_WRITE_BUFFER
Definition: rsl10.c:67
static int rsl10_ll_flash_write(struct rsl10_info *chip, uint32_t address, const uint8_t *buffer, uint32_t bytes)
Definition: rsl10.c:392
#define RSL10_FLASH_REG_STATUS_NVR1_W_UNLOCKED
Definition: rsl10.c:62
static const struct command_registration rsl10_exec_command_handlers[]
Definition: rsl10.c:791
#define RSL10_FLASH_ADDRESS_LOCK_INFO_SETTING
Definition: rsl10.c:29
#define RSL10_KEY_DEBUG_LOCK
Definition: rsl10.c:49
#define RSL10_FLASH_KEY_MAIN
Definition: rsl10.c:47
#define RSL10_NVR3_USER_KEY_OFFSET
Definition: rsl10.c:44
#define RSL10_FLASH_REG_MAIN_CTRL
Definition: rsl10.c:34
static const char * rsl10_error(enum rsl10_flash_status x)
Definition: rsl10.c:110
static bool rsl10_bank_is_probed(const struct flash_bank *bank)
Definition: rsl10.c:131
static int rsl10_get_probed_chip_if_halted(struct flash_bank *bank, struct rsl10_info **chip)
Definition: rsl10.c:140
#define RSL10_FLASH_REG_NVR_CTRL_NVR1_W_ENABLE
Definition: rsl10.c:55
rsl10_flash_status
Definition: rsl10.c:86
@ RSL10_FLASH_ERR_INACCESSIBLE
Definition: rsl10.c:93
@ RSL10_FLASH_ERR_WRITE_NOT_ENABLED
Definition: rsl10.c:89
@ RSL10_FLASH_MAX_ERR_CODES
Definition: rsl10.c:96
@ RSL10_FLASH_ERR_BAD_LENGTH
Definition: rsl10.c:92
@ RSL10_FLASH_ERR_PROG_FAILED
Definition: rsl10.c:95
@ RSL10_FLASH_ERR_BAD_ADDRESS
Definition: rsl10.c:90
@ RSL10_FLASH_ERR_GENERAL_FAILURE
Definition: rsl10.c:88
@ RSL10_FLASH_ERR_NONE
Definition: rsl10.c:87
@ RSL10_FLASH_ERR_COPIER_BUSY
Definition: rsl10.c:94
@ RSL10_FLASH_ERR_ERASE_FAILED
Definition: rsl10.c:91
static int rsl10_mass_erase(struct target *target)
Definition: rsl10.c:496
#define RSL10_FLASH_REG_NVR_CTRL_NVR2_W_ENABLE
Definition: rsl10.c:56
#define RSL10_FLASH_REG_IF_STATUS
Definition: rsl10.c:35
static int rsl10_ll_flash_erase(struct rsl10_info *chip, uint32_t address)
Definition: rsl10.c:335
#define RSL10_FLASH_ADDRESS_NVR3
Definition: rsl10.c:27
#define RSL10_FLASH_ADDRESS_NVR1
Definition: rsl10.c:25
static struct rsl10_info * rsl10_get_chip(struct target *target)
Definition: rsl10.c:593
#define RSL10_FLASH_REG_MAIN_WRITE_UNLOCK
Definition: rsl10.c:33
COMMAND_HANDLER(rsl10_lock_command)
Definition: rsl10.c:669
#define RSL10_FLASH_REG_DEBUG_UNLOCK_KEY1
Definition: rsl10.c:39
#define RSL10_ID
Definition: rsl10.c:46
static int rsl10_check_device(struct flash_bank *bank)
Definition: rsl10.c:255
static int rsl10_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
Definition: rsl10.c:549
#define RSL10_ROM_CMD_ERASE_ALL
Definition: rsl10.c:69
#define RSL10_FLASH_REG_NVR_CTRL_NVR3_W_ENABLE
Definition: rsl10.c:57
#define RSL10_FLASH_REG_STATUS_NVR3_W_UNLOCKED
Definition: rsl10.c:64
struct rtt_source source
Definition: rtt/rtt.c:23
This represents an ARM Debug Interface (v5) Access Port (AP).
Definition: arm_adi_v5.h:250
struct adiv5_dap * dap
DAP this AP belongs to.
Definition: arm_adi_v5.h:254
This represents an ARM Debug Interface (v5) Debug Access Port (DAP).
Definition: arm_adi_v5.h:348
struct adiv5_dap * dap
For targets conforming to ARM Debug Interface v5, this handle references the Debug Access Port (DAP) ...
Definition: arm.h:257
unsigned int common_magic
Definition: armv7m.h:299
enum arm_mode core_mode
Definition: armv7m.h:301
struct arm arm
Definition: armv7m.h:229
const char * name
Definition: command.h:235
struct armv7m_common armv7m
Definition: cortex_m.h:224
Provides details of a flash bank, available either on-chip or through a major interface.
Definition: nor/core.h:75
const struct flash_driver * driver
Driver for this bank.
Definition: nor/core.h:80
void * driver_priv
Private driver storage pointer.
Definition: nor/core.h:81
struct flash_bank * next
The next flash bank on this chip.
Definition: nor/core.h:128
struct target * target
Target to which this bank belongs.
Definition: nor/core.h:78
Provides the implementation-independent structure that defines all of the callbacks required by OpenO...
Definition: nor/driver.h:39
const char * name
Gives a human-readable name of this flash driver, This field is used to select and initialize the dri...
Definition: nor/driver.h:44
struct rsl10_info * chip
Definition: rsl10.c:123
struct rsl10_info::rsl10_bank bank[5]
unsigned int flash_size_kb
Definition: rsl10.c:128
unsigned int refcount
Definition: rsl10.c:120
struct target * target
Definition: rsl10.c:126
Definition: target.h:116
uint32_t working_area_size
Definition: target.h:151
target_addr_t address
Definition: target.h:86
void target_buffer_set_u32(struct target *target, uint8_t *buffer, uint32_t value)
Definition: target.c:352
int target_write_buffer(struct target *target, target_addr_t address, uint32_t size, const uint8_t *buffer)
Definition: target.c:2343
int target_run_algorithm(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_param, target_addr_t entry_point, target_addr_t exit_point, unsigned int timeout_ms, void *arch_info)
Downloads a target-specific native code algorithm to the target, and executes it.
Definition: target.c:774
uint32_t target_get_working_area_avail(struct target *target)
Definition: target.c:2165
int target_alloc_working_area(struct target *target, uint32_t size, struct working_area **area)
Definition: target.c:2061
int target_write_u32(struct target *target, target_addr_t address, uint32_t value)
Definition: target.c:2642
int target_free_working_area(struct target *target, struct working_area *area)
Free a working area.
Definition: target.c:2119
int target_read_u32(struct target *target, target_addr_t address, uint32_t *value)
Definition: target.c:2551
struct target * get_current_target(struct command_context *cmd_ctx)
Definition: target.c:458
void target_buffer_set_u32_array(struct target *target, uint8_t *buffer, uint32_t count, const uint32_t *srcbuf)
Definition: target.c:417
#define ERROR_TARGET_NOT_HALTED
Definition: target.h:790
#define ERROR_TARGET_INVALID
Definition: target.h:787
@ TARGET_HALTED
Definition: target.h:56
#define TARGET_ADDR_FMT
Definition: types.h:342
#define ARRAY_SIZE(x)
Compute the number of elements of a variable length array.
Definition: types.h:57
#define NULL
Definition: usb.h:16
uint8_t status[4]
Definition: vdebug.c:17
uint8_t cmd
Definition: vdebug.c:1
uint8_t offset[4]
Definition: vdebug.c:9
uint8_t count[4]
Definition: vdebug.c:22